AT17A Series

3

Pin Configurations

PLCC/S

OIC

DIP

Pin

Pin

Name

I/O

Description

2

1

DATA

I/O

Three-state DATA output for reading. Input/Output pin for programming.

4

2

CLK

I

Clock input. Used to increment the internal address and bit counter for reading and

programming.

8

3

RESET/OE

RESET/Output Enable input (when SER_EN is High). A low level on both the CE and

RESET/OE inputs enables the data output driver. A high level on RESET/OE resets both

the address and bit counters. A logic polarity of this input is programmable as either

RESET/OE or RESET/OE. This document describes the pin as RESET/OE.

94

CE

I

Chip Enable input. Used for device selection. A low level on both CE and OE enables the

data output driver. A high level on CE disables both the address and bit counters and

forces te device into a low-power mode. Note this pin will not enable/disable the device in

2-wire serial mode (ie; when SER_EN is low).

10

5

GND

Ground pin

12

6

CEO

O

Chip Enable Out output. This signal is asserted low on the clock cycle following the last

bit read from the memory. It will stay low as long as CE and OE are both low. It will then

follow CE until OE goes high. Thereafter, CEO will stay high until the entire PROM is

read again and senses the status of RESET polarity.

A2

I

Device selection input, A2. This is used to enable (or select) the device during

programming and when SER_EN is low (see Programming Guide for more details).

18

7

SER_EN

I

Serial enable is normally high during FPGA loading operations. Bringing SER_EN low,

enables the 2-wire serial interface for programming.

20

8

V

CC

+3.3V/+5V power supply pin.

Absolute Maximum Ratings*

Operating Temperature .................................. -55°C to +125 °C

*NOTICE:

Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect device

reliability.

Storage Temperature ..................................... -65 °C to +150°C

Voltage on Any Pin

with Respect to Ground ............................. -0.1V to V

Supply Voltage (V

Maximum Soldering Temp. (10 sec. @ 1/16 in.) .............260

°C

ESD (R