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LMES025U Datasheet(PDF) 6 Page - Sensortechnics GmbH

Part No. LMES025U
Description  digital low differential pressure sensors
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Maker  SENSORTECHNICS [Sensortechnics GmbH]
Homepage  http://www.sensortechnics.com
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LMES025U Datasheet(HTML) 6 Page - Sensortechnics GmbH

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E / 11822 / C
LME series – digital low differential pressure sensors
Page 6/12
Subject to change without notice
www.first-sensor.com
contact@first-sensor.com
SPI – Serial Peripheral Interface
Introduction
The LME serial interface is a high-speed synchronous data input and
output communication port. The serial interface operates using a stan-
dard 4-wire SPI bus. The LME device runs in SPI mode 0, which requires
the clock line SCLK to idle low (CPOL = 0), and for data to be sampled
on the leading clock edge (CPHA = 0). Figure 5 illustrates this mode of
operation.
Care should be taken to ensure that the sensor is properly connected
to the master microcontroller. Refer to the manufacturer's datasheet for
more information regarding physical connections.
Application circuit
The use of pull-up resistors is generally unnecessary for SPI as most
master devices are configured for push-pull mode. There are, however,
some cases where it may be helpful to use 33
Ω series resistors at both
ends of the SPI lines, as shown in Figure 3.
Signal quality may be further improved by the addition of a buffer as
shown in Figure 4. These cases include multiple slave devices on the
same bus segment, using a master device with limited driving capability
and long SPI bus lines.
If these series resistors are used, they must be physically placed as
close as possible to the pins of the master and slave devices.
Signal control
The serial interface is enabled by asserting /CS low. The serial input
clock, SCLK, is gated internally to begin accepting the input data at
MOSI, or sending the output data on MISO. When /CS rises, the data
clocked into MOSI is loaded into an internal register.
MOSI
MISO
SCLK
/CS
µC
33
33
33
33
33
33
33
33
Fig. 3: Application circuit with resistors at both ends of the SPI lines
Fig. 4: Application circuit with additional buffer
Sensor
33
33
33
33
33
33
33
33
33
33
33
33
/OE
/OE
/OE
/OE
MOSI
MISO
SCLK
/CS
MOSI
MISO
SCLK
/CS
µC
Sensor
MOSI
MISO
SCLK
/CS


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