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PM6344 Datasheet(PDF) 3 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 3 Page - PMC-Sierra, Inc |
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3 / 256 page  STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER ii 8.16 MICROPROCESSOR INTERFACE (MPIF) ........................................................47 9 REGISTER DESCRIPTION .............................................................................................48 10 NORMAL MODE REGISTER DESCRIPTION.................................................................52 10.1 SIGX INDIRECT REGISTERS 96 (60H) - 127 (7FH) - SEGMENT 4: TYPICAL PER-TIMESLOT CONFIGURATION AND SIGNALING TRUNK ......................156 10.2 REGISTERS 049-04FH, 0C9H-0CFH, 149H-14FH, 1C9H-1CFH: LATCHING PERFORMANCE DATA.....................................................................................168 11 TEST FEATURES DESCRIPTION ................................................................................176 11.1 TEST MODE 0 ..................................................................................................176 12 FUNCTIONAL TIMING...................................................................................................180 12.1 RECEIVE BACKPLANE INTERFACE...............................................................182 13 OPERATION ..................................................................................................................191 13.1 USING THE INTERNAL FDL TRANSMITTER .................................................192 13.2 USING THE INTERNAL FDL RECEIVER.........................................................194 13.3 USING THE LOOPBACK MODES....................................................................201 13.3.1 PAYLOAD LOOPBACK ........................................................................202 13.3.2 LINE LOOPBACK ................................................................................203 13.3.3 DIAGNOSTIC DIGITAL LOOPBACK ...................................................203 13.4 USING THE PER-CHANNEL SERIAL CONTROLLERS ..................................204 13.4.1 INITIALIZATION ...................................................................................204 13.4.2 DIRECT ACCESS MODE ....................................................................205 13.4.3 INDIRECT ACCESS MODE ................................................................205 13.5 USING THE DIGITAL JITTER ATTENUATOR ..................................................206 13.5.1 DEFAULT APPLICATION .....................................................................206 13.5.2 DATA BURST APPLICATION ...............................................................206 |
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