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S-25A020A0A-K8T2UD Datasheet(PDF) 8 Page - Seiko Instruments Inc

Part # S-25A020A0A-K8T2UD
Description  Write protect function during the low power supply voltage
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Manufacturer  SII [Seiko Instruments Inc]
Direct Link  http://www.sii.co.jp
Logo SII - Seiko Instruments Inc

S-25A020A0A-K8T2UD Datasheet(HTML) 8 Page - Seiko Instruments Inc

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FOR AUTOMOTIVE 125°C OPERATION SPI SERIAL E2PROM
S-25A010A/020A/040A
Rev.5.2_01
8
Table 16
Item
Symbol
Ta =
−40°C to +105°C
Unit
VCC = 2.5 V to 5.5 V VCC = 3.0 V to 5.5 V VCC = 4.5 V to 5.5 V
Min.
Max.
Min.
Max.
Min.
Max.
SCK clock frequency
fSCK
3.5
5.0
6.5
MHz
CS setup time during CS falling
tCSS.CL
90
90
65
ns
CS setup time during CS rising
tCSS.CH
90
90
65
ns
CS deselect time
tCDS
160
140
110
ns
CS hold time during CS falling
tCSH.CL
90
90
65
ns
CS hold time during CS rising
tCSH.CH
90
90
65
ns
SCK clock time "H"*1
tHIGH
125
95
65
ns
SCK clock time "L"*1
tLOW
125
95
65
ns
Rising time of SCK clock*2
tRSK
1
1
1
μs
Falling time of SCK clock*2
tFSK
1
1
1
μs
SI data input setup time
tDS
20
20
20
ns
SI data input hold time
tDH
30
30
30
ns
SCK "L" hold time during HOLD rising
tSKH.HH
70
70
45
ns
SCK "L" hold time during HOLD falling
tSKH.HL
40
40
30
ns
SCK "L" setup time during HOLD falling
tSKS.HL
0
0
0
ns
SCK "L" setup time during HOLD rising
tSKS.HH
0
0
0
ns
Disable time of SO output*2
tOZ
100
100
75
ns
Delay time of SO output
tOD
120
90
60
ns
Hold time of SO output
tOH
0
0
0
ns
Rising time of SO output*2
tRO
80
70
50
ns
Falling time of SO output*2
tFO
80
70
50
ns
Disable time of SO output during HOLD falling*2
tOZ.HL
100
100
75
ns
Delay time of SO output during HOLD rising*2
tOD.HH
80
80
60
ns
WP
setup time
tWS1
0
0
0
ns
WP
hold time
tWH1
0
0
0
ns
WP release / setup time
tWS2
0
0
0
ns
WP
release / hold time
tWH2
150
150
100
ns
*1.
The clock cycle of the SCK clock (frequency fSCK) is 1 / fSCK
μs. This clock cycle is determined by a combination of
several AC characteristics. Note that the clock cycle cannot be set as (1 / fSCK) = tLOW (min.)
+ tHIGH (min.) by minimizing
the SCK clock cycle time.
*2.
These are values of sample and not 100% tested.


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