853S111BKILFT datasheet(9/25 Pages) IDT

Part #	853S111BKILFT

Description	Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Fanout Buffer

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Manufacturer	IDT [Integrated Device Technology]

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Revision F, January 14, 2016

853S111B Datasheet

Additive Phase Jitter

The spectral purity in a band at a specific offset from the fundamental

compared to the power of the fundamental is called the dBc Phase

Noise. This value is normally expressed using a Phase noise plot

and is most often the specified plot in many applications. Phase noise

is defined as the ratio of the noise power present in a 1Hz band at a

specified offset from the fundamental frequency to the power value of

the fundamental. This ratio is expressed in decibels (dBm) or a ratio

of the power in the 1Hz band to the power in the fundamental. When

the required offset is specified, the phase noise is called a dBc value,

which simply means dBm at a specified offset from the fundamental.

By investigating jitter in the frequency domain, we get a better

understanding of its effects on the desired application over the entire

time record of the signal. It is mathematically possible to calculate an

expected bit error rate given a phase noise plot.

As with most timing specifications, phase noise measurements have

issues relating to the limitations of the equipment. Often the noise

floor of the equipment is higher than the noise floor of the device. This

is illustrated above. The device meets the noise floor of what is

shown, but can actually be lower. The phase noise is dependent on

the input source and measurement equipment.

Rohde & Schwarz SMA100A Signal Generator 9kHz - 6GHz as

external input to a Hewlett Packard 8133A 3GHz Pulse Generator.

Additive Phase Jitter @ 155.52MHz

12kHz to 20MHz = 0.03ps (typical)

Offset from Carrier Frequency (Hz)

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