G

G

1A

1B

1Y

2A

2B

2Y

3A

3B

3Y

4A

4B

4Y

Copyright © 2016, Texas Instruments Incorporated

10

SN65LBC173A-EP

SLLSEH1 – NOVEMBER 2016

www.ti.com

Product Folder Links: SN65LBC173A-EP

Submit Documentation Feedback

Copyright © 2016, Texas Instruments Incorporated

8 Detailed Description

8.1 Overview

The SN65LBC173A is a quadruple differential line receiver with tri-state outputs, designed for TIA/EIA-485 (RS-

485), TIA/EIA-422 (RS-422), and ISO 8482 (Euro RS-485) applications. This device is optimized for balanced

multipoint bus communication at data rates up to and exceeding 50 million bits per second. The transmission

media may be twisted-pair cables, printed-circuit board traces, or backplanes. The ultimate rate and distance of

data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the

environment.

The receiver operates over a wide range of positive and negative common-mode input voltages, and features

ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh

environments. These devices are designed using LinBiCMOS®, facilitating low-power consumption and

robustness.

The G and G inputs provide enable control logic for either positive- or negative-logic enabling all four drivers.

When disabled or powered off, the receiver inputs present a high-impedance to the bus for reduced system

loading.

8.2 Functional Block Diagram

8.3 Feature Description

The device can be configured using the G and G logic inputs to select receiver output. The high voltage or logic

1 on the G pin allows the device to operate on an active-high, and having a low voltage or logic 0 on the G

enables active low operation. These are simple ways to configure the logic to match that of the receiving or

transmitting controller or microprocessor.