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GS7660IS Datasheet(PDF) 6 Page - Vishay Siliconix |
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GS7660IS Datasheet(HTML) 6 Page - Vishay Siliconix |
6 / 9 page GS7660 Vishay formerly General Semiconductor www.vishay.com Document Number 74819 6 24-May-02 To better understand the theory of operation, a review of the basic switched capacitor building block is helpful (see Fig. 8). Referring to Fig. 8 and looking at one full cycle of operation, the charge being drained by the load is Qavg or IL x T (T being the time period of one full cycle). All the charge ( ∆q) flowing into the output is being delivered by the input to C1 during only half the cycle. Under steady- state condition, C1 will charge to the level of the input voltage (VIN) and discharge to the peak level of the output voltage (VOUT). Therefor the voltage change on C1 is VIN – VOUT. Where f is one-half the oscillator frequency. This resistance is a major component of the output resistance of switched capacitor circuits. With C1 = C2 = 10 µF and Fosc = 10kHz, this resistance represents 20 Ω. Under the same conditions, the typical value in the “Electrical Characteristics” section of the GS7660 is 35 Ω. VIN C1 f C2 RLOAD VOUT Fig. 8 – Switched Capacitor Model Qavg = ∆q = C1(Vin –Vout) IL x T = C1(Vin –Vout) or IL = f x C1(Vin –Vout) f = 1/T (Vin –Vout) 1 f x C1 IL = and REQUIV = (See fig. 9) 1 f x C1 Design Information Low Voltage (LV) Pin Fig. 10 (below) shows a simplified circuit diagram of the GS7660. It shows a voltage regulator between the VIN and Gnd, in series with the Oscillator. Grounding the LV pin removes the regulator from this series path and improves low voltage performance down to 1.5V. For supply voltages less than 3.0V, the LV pin should be connected to ground and left open for voltages above 3.0V. The LV pin can be left grounded over the total range of Input Voltages. This will improve low voltage operation and increase oscillator frequency. The disadvantage is increased quiescent current and reduced efficiency at higher voltages. 1M BOOST pin 1 OSC pin 7 LV pin 6 GND pin 3 CAP- pin 4 S2 S1 S4 S3 CAP+ pin 2 VIN pin 8 VOUT pin 5 ÷ 2 Q Q Fig. 10 – Functional Diagram REQUIV = REQUIV VOUT RLOAD 1 VIN f × C1 C2 Fig. 9 – Equivalent Impedance |
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