932SQ426AGLF datasheet(1/25 Pages) IDT

Part #	932SQ426AGLF

Description	DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

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Manufacturer	IDT [Integrated Device Technology]

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DATASHEET

CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

932SQ426

IDT®

CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

1

932SQ426

REV C 022916

General Description

The 932SQ426 is a CK420BQ derivative supporting

Separate Reference no Spread (SRnS) PCIe clocking

architectures. It uses a 25MHz crystal for maximum

performance and has 100MHz outputs tuned for

non-spreading applications to provide the most open eye

diagram on PCIe links.

Recommended Application

CK420BQ for SRnS applications

Output Features

• 11 - HCSL 100MHz outputs for SRnS

• 4 - NS_SAS/SRC outputs

• 4 - CPU outputs

• 3 - SRC outputs

• 1 - HCSL DOT96 output

• 1 - 3.3V 48M output

• 5 - 3.3V PCI outputs

• 1 - 3.3V 14.318M output

Features/Benefits

• Non-spread 100MHz outputs/ Supports SRnS PCIe

architectures

• 64-pin TSSOP and VFQFPN packages; maximum space

savings

Key Specifications

• Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS < 50ps

• Phase jitter: PCIe Gen2 <3ps rms

• Phase jitter: PCIe Gen3 <1ps rms

• Phase jitter: QPI 9.6GB/s <0.2ps rms

• Phase jitter: NS-SAS <0.4ps rms using raw phase data

• Phase jitter: NS-SAS <1.3ps rms using Clk Jit Tool 1.6.4

Block Diagram

Logic

X1_25

X2

SRC(2:0)

SMBDAT

SMBCLK

CKPWRGD#/PD

IREF

CPU(3:0)

Low Drift non-SS

PLL

<500ps LTJ

NS_SAS(1:0)

NS_SRC(1:0)

DOT96

48M

PCI(4:0)

14.31818MHz

Non-SS PLL

REF14M

Test_Mode

Test_Sel

Non-SS PLL

/3

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932SQ426AGLF Datasheet(PDF) 1 Page - Integrated Device Technology

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