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AN-1192 Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. AN-1192
Description  broad portfolio of monolithic power integrated circuits covering power levels
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com

AN-1192 Datasheet(HTML) 5 Page - National Semiconductor (TI)

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4.0 Thermal Background (Continued)
The data summarized in Table 2 was obtained by using the
bridged/parallel configuration and the following conditions:
The system was warmed up for an hour using a power
dissipation of 30W per device with a 4
Ω load. Four different
temperature points were measured after stabilizing, then the
supply voltages were incremented while insuring that SPiKe
Protection was not enabled during each test by monitoring
each amplifier output. The supply voltages continued to be
incremented until SPiKe protection or thermal shutdown was
enabled, providing the IC’s power dissipation limits under
those operating conditions.
The input stimulus was a 20Hz sinewave with an amplitude
corresponding to the worst case power dissipation for the
given load and supply voltage. The ICs were evenly spread
out along the heatsink with dimensions of: 3.25" high x
13.25" long x 1.3125" deep. The main body of the heatsink is
0.25" thick with (10) 1.0625" deep fins and the heatsink is
black anodized. (See section 9.2 for detailed drawing.) Un-
fortunately, the fins ran horizontally, which hindered heat
radiation without a fan, but helped with air flow and heat
dissipation when a fan was used.
This same testing procedure can be used for any number of
booster circuits, including variations of the bridged/parallel
circuit. Another variation would be to add more ICs in parallel
to further reduce power dissipation, allowing low impedance
loads to be driven to obtain even higher output power levels.
5.0 BR100—100W Bridge Circuit
The following graphs represent the performance level attain-
able from the bridged circuit found in Figure 3 with a well
designed PCB and properly heat sinked. The testing focused
on maximum output power capabilities and amplifier linear-
ity. The low THD+N plots shown in Figures1&2 exemplify
the high degree of linearity of the bridged circuit which
directly translates into a cleaner sounding more transparent
amplifier. Other bridged circuit topologies that use the output
of one amplifier as the input to the second inverting amplifier
inherently possess higher THD and noise that will degrade
the solution’s sound quality.
5.1.1 Linearity Tests
The linearity of the amplifier is represented by the low
THD+N values shown in Figures 1, 2. Figure 1 represents
the THD+N vs Frequency for 1W, 56W, and 100W power
levels. The 20kHz THD+N is less than 0.02% for 1W and
about 0.008% for 56W and above. For normal listening
levels, the THD+N is about 0.004% for most of the audio
band. Figure 2 represents the THD+N vs Output Power
Level for 20Hz, 1kHz, and 20kHz. The THD+N between
20Hz and 1kHz is less than 0.004% from 1W to the clipping
point. The 20kHz THD+N is less than 0.02% from 1W to the
clipping point. The continuous clipping point power is around
105W while the power at 10% THD+N is about 140W. These
THD+N graphs were obtained using relative THD units,
which indicates that the noise level for the amplifier is quite
low. Typically, the noise level becomes a significant THD+N
contributor at low power levels and shows up as a linearly
decreasing function of increasing input signal amplitude. The
low power level THD+N for this amplifier is more than ac-
ceptable for home entertainment applications.
Figure 3 represents the bridged amplifier schematic. The
design is extremely simple, consisting of a non-inverting
power op amp configuration and an inverting power op amp
configuration. The input to the amplifier solution goes to
each individual configuration. While closed-loop gain match-
ing is not critical, it is recommended to have fairly close
values. The main functional point to note about this solution
is that for a positive going input signal, amplifier U1 will have
a positive changing output signal while U2 will have a nega-
tive changing output signal. The final voltage across the load
is two times the peak amplitude of each individual amplifier
output. Since output power is based on the square of the
output voltage, the output power is theoretically quadrupled.
This document will not go further into the functionality of the
circuit as it is widely known in industry.
BR100 THD+N vs Frequency, R
L =8
CC ±25.5V,
BW <80kHz, P
O = 1W, 56W, 100W
FIGURE 1. THD+N vs Frequency
BR100 THD+N vs Output Power
f = 20Hz, 1 kHz, 20kHz,
L =8
CC = ±25.5V, BW <80kHz
FIGURE 2. THD+N vs Output Power

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