Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

STW5094 Datasheet(PDF) 4 Page - STMicroelectronics

Part No. STW5094
Description  18 BIT 8kHz TO 48kHz LOW POWER STEREO AUDIO DAC WITH INTEGRATED POWER AMPLIFIERS AND VOICE CODEC
Download  37 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STW5094 Datasheet(HTML) 4 Page - STMicroelectronics

  STW5094 Datasheet HTML 1Page - STMicroelectronics STW5094 Datasheet HTML 2Page - STMicroelectronics STW5094 Datasheet HTML 3Page - STMicroelectronics STW5094 Datasheet HTML 4Page - STMicroelectronics STW5094 Datasheet HTML 5Page - STMicroelectronics STW5094 Datasheet HTML 6Page - STMicroelectronics STW5094 Datasheet HTML 7Page - STMicroelectronics STW5094 Datasheet HTML 8Page - STMicroelectronics STW5094 Datasheet HTML 9Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 37 page
background image
STw5094
4/37
PIN FUNCTION
Pin
Name
Type
Description
B1
MIC1P
AI
Positive high impedance input to transmit preamplifier for microphone 1 connection.
B2
MIC1N
AI
Negative high impedance input to transmit preamplifier for microphone 1 connection.
A2
MIC2P
AI
Positive high impedance input to transmit preamplifier for microphone 2 connection.
A1
MIC2N
AI
Negative high impedance input to transmit preamplifier for microphone 2 connection.
C1
MIC3
AI
High impedance single ended input to transmit preamplifier for line input connection.
Only 0dB gain is allowed.
B3
MBIAS
AO
Microphone Biasing Switch.
E1
FML
AI
Auxiliary analog audio Left channel input.
D2
FMR
AI
Auxiliary analog audio Right channel input.
F2,F1
LSP, LSN
AO
Receive analog amplifier complementary outputs. This differential output can drive
50nF (with series resistor) or directly an earpiece transductor of 8
Ω. The signal at this
output can be: the sum of the Receive Speech signal from DR, the Internal Tone
Generator, and the Sidetone signal, or the sum of the Audio Left channel and the
Internal Tone Generator, or can come from FML input.
E2
HPL
AO
Audio headphone amplifier Left channel output. This output can drive 50nF (with
series resistor) or directly an earpiece transductor of 30
Ω. The signal at this output
can be the sum of Audio Left channel and Internal Tone Generator, or the sum of
Receive Speech signal from DR, Internal Tone Generator, Sidetone signal, or can
come from FML input.
F4
HPR
AO
Audio headphone amplifier Right channel output. This output can drive 50nF (with
series resistor) or directly an earpiece transductor of 30
Ω. The signal at this output
can be the sum of Audio Right channel and Internal Tone Generator, or the sum of
Receive Speech signal from DR, Internal Tone Generator, Sidetone signal, or can
come from FMR input.
A3
REMOUT
DO
Remocon function digital output.
C4
REMIN
DI
Remocon function input. A high level at this pin is detected as a non pressed key,
while a low level is detected as a pressed key.
E6
BZ
AO
Pulse width modulated buzzer driver output.
F6
SCL
DI
I2C-bus interface serial clock input. SCL is asynchronous with the other system
clocks.
F5
SDA
DIO
I2C-bus interface serial data input-output.
C6
LRCK
DI
Left
⁄ Right clock for Audio interface input.
D6
SCK
DI
Audio interface Clock input.
D5
SDI
DI
Audio interface Data input.
E5
OCK
DI
Master Clock Input for Audio Mode. Can also be used as Master Clock in Tone Only
and FM Modes.
A6
DX
DOT
Transmit Data output: Data is shifted out on this pin during the assigned transmit time
slots. Elsewhere DX output is in the high impedance state. In delayed and
non-delayed normal frame sync modes, voice data byte is shifted out from tristate
output DX at the MCLK frequency on the rising edge of MCLK, while in non-delayed
reverse frame sync mode voice data is shifted out on the falling edge of MCLK.
A5
DR
DI
Receive data input: Data is shifted in during the assigned Received time slots In
delayed and non-delayed normal frame sync modes voice data byte is shifted in at
the MCLK frequency on the falling edges of MCLK, while in non-delayed reverse
frame sync mode voice data byte is shifted in on the rising edge of MCLK.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn