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TMS28F010B-12 Datasheet(PDF) 9 Page - Texas Instruments |
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TMS28F010B-12 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 23 page TMS28F010B 131072 BY 8-BIT FLASH MEMORY SMJS824B – MAY 1995 – REVISED AUGUST 1997 9 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Fastwrite algorithm The TMS28F010B is programmed using the Texas Instruments Fastwrite algorithm shown in Figure 1. This algorithm programs in a nominal time of two seconds. Fasterase algorithm The TMS28F010B is erased using the Texas Instruments Fasterase algorithm shown in Figure 2. The memory array needs to be completely programmed (using the Fastwrite algorithm) before erasure begins. Erasure typically occurs in one second. parallel erasure To reduce total erase time, several devices can be erased in parallel. Since each Flash Memory can erase at a different rate, every device must be verified separately after each erase pulse. After a given device has been successfully erased, the erase command should not be issued to this device again. All devices that complete erasure should be masked until the parallel erasure process is finished (see Figure 3). Examples of how to mask a device during parallel erase include driving the E pin high, writing the read command (00h) to the device when the others receive a set-up-erase or erase command, or disconnecting it from all electrical signals with relays or other types of switches. |
Similar Part No. - TMS28F010B-12 |
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Similar Description - TMS28F010B-12 |
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