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9FGU0631CKLFT Datasheet(PDF) 5 Page - Integrated Device Technology |
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9FGU0631CKLFT Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 15 page OCTOBER 18, 2016 5 6-O/P 1.5V PCIE GEN 1-2-3 CLOCK GENERATOR 9FGU0631 DATASHEET Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the 9FGU0631. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Electrical Characteristics–Current Consumption Electrical Characteristics–DIF Output Duty Cycle, Jitter, and Skew Characteristics PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Supply Voltage VDDxx Applies to all VDD pins -0.5 2 V 1,2 Input Voltage VIN -0.5 VDD+0.5V V 1,3 Input High Voltage, SMBus VIHSMB SMBus clock and data pins 3.3V V 1 Storage Temperature Ts -65 150 °C 1 Junction Temperature Tj 125 °C 1 Input ESD protection ESD prot Human Body Model 2000 V 1 1Guaranteed by design and characterization, not 100% tested in production. 2 Operation under these conditions is neither implied nor guaranteed. 3 Not to exceed 2.5V. TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES IDDAOP VDDA, All outputs active @100MHz 6.0 9 mA IDDOP All VDD, except VDDA and VDDIO, All outputs active @100MHz 8.8 14 mA IDDIOOP VDDIO, All outputs active @100MHz 21 30 mA IDDAPD VDDA, DIF outputs off, REF output running 0.4 1 mA 2 IDDPD All VDD, except VDDA and VDDIO, DIF outputs off, REF output running 4.7 7.5 mA 2 IDDIOPD VDDIO, DIF outputs off, REF output running 0.04 0.1 mA 2 IDDAPD VDDA, all outputs off 0.4 1 mA IDDPD All VDD, except VDDA and VDDIO, all outputs off 0.4 1 mA IDDIOPD VDDIO, all outputs off 0.0003 0.1 mA 1 Guaranteed by design and characterization, not 100% tested in production. 2 This is the current required to have the REF output running in Wake-on-LAN mode (Byte 3, bit 5 = 1) Operating Supply Current Wake-on-LAN Current (CKPWRGD_PD# = '0' Byte 3, bit 5 = '1') Powerdown Current (CKPWRGD_PD# = '0' Byte 3, bit 5 = '0') TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Duty Cycle tDC Measured differentially, PLL Mode 45 50 55 % 1,2 Skew, Output to Output tsk3 Averaging on, VT = 50% 32 60 ps 1 Jitter, Cycle to cycle tjcyc-cyc 16 50 ps 1,2 1Guaranteed by design and characterization, not 100% tested in production. 2 Measured from differential waveform |
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