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PC87373 Datasheet(PDF) 10 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87373
Description  LPC SuperI/O with Glue Functions
Download  174 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87373 Datasheet(HTML) 10 Page - National Semiconductor (TI)

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Table of Contents (Continued)
10
www.national.com
Revision 1.1
8.0
Fan Speed Monitor
8.1
OVERVIEW ............................................................................................................................. 110
8.2
FUNCTIONAL DESCRIPTION ................................................................................................ 110
8.3
FAN SPEED MONITOR REGISTERS ..................................................................................... 112
8.3.1
Fan Speed Monitor Register Map ............................................................................ 112
8.3.2
Fan Speed Monitor Threshold Low Register (FMTHRL) ........................................... 112
8.3.3
Fan Speed Monitor Threshold High Register (FMTHRH) .......................................... 113
8.3.4
Fan Speed Monitor Speed Low Register (FMSPRL) ................................................. 113
8.3.5
Fan Speed Monitor Speed High Register (FMSPRH) ............................................... 114
8.3.6
Fan Speed Monitor Control and Status Register (FMCSR) ....................................... 114
8.4
FAN SPEED MONITOR REGISTER BITMAP ......................................................................... 115
9.0
Glue Functions
9.1
OVERVIEW ............................................................................................................................. 116
9.2
FUNCTIONAL DESCRIPTION ................................................................................................ 116
9.2.1
Highest Active Main Supply Reference ..................................................................... 116
9.2.2
Highest Active Standby Supply Reference ................................................................ 118
9.2.3
Resume Reset ........................................................................................................... 120
9.2.4
Main Power Good ...................................................................................................... 121
9.2.5
Rambus SCK Clock Gate Control ............................................................................. 121
9.2.6
Power Distribution Control ......................................................................................... 122
9.2.7
Main Power Supply Control ....................................................................................... 122
9.2.8
CNR Downstream Codec Dynamic Control ............................................................... 123
9.2.9
Hard-Disk LED Indicator Control ............................................................................... 123
9.2.10
SMBus Voltage Translation ....................................................................................... 123
9.2.11
SMBus Isolation ......................................................................................................... 124
10.0
Game Port (GMP)
10.1
OVERVIEW ............................................................................................................................. 125
10.2
FUNCTIONAL DESCRIPTION ................................................................................................ 125
10.2.1
Game Device Axis Position Indication ....................................................................... 125
10.2.2
Capturing the Position ............................................................................................... 126
10.2.3
Button Status Indication ............................................................................................. 126
10.2.4
Game Port Operation ................................................................................................ 127
10.3
GAME PORT REGISTERS ..................................................................................................... 128
10.3.1
Game Port Register Map ........................................................................................... 128
10.3.2
Game Port Status Register (GMPST) ....................................................................... 128
10.4
GAME PORT REGISTER BITMAP ......................................................................................... 129
11.0
Musical Instrument Digital Interface (MIDI) Port
11.1
OVERVIEW ............................................................................................................................. 130
11.2
FUNCTIONAL DESCRIPTION ................................................................................................ 130
11.2.1
Internal Bus Interface Unit ......................................................................................... 131
11.2.2
Port Control and Status Registers ............................................................................. 131
11.2.3
Data Buffers and FIFOs ............................................................................................. 131
11.2.4
MIDI Communication Engine ..................................................................................... 131


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