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9DBL0452BKILFT Datasheet(PDF) 4 Page - Integrated Device Technology |
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9DBL0452BKILFT Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 19 page 4-OUTPUT 3.3V PCIE ZERO-DELAY BUFFER 4 NOVEMBER 11, 2016 9DBL04 DATASHEET Test Loads Alternate Terminations The 9DBL family can easily drive LVPECL, LVDS, and CML logic. See “AN-891 Driving LVPECL, LVDS, and CML Logic with IDT's "Universal" Low-Power HCSL Outputs” for details. Rs Rs Low-Power Differential Output Test Load 2pF 2pF 5 inches Zo=100ohm Note: The device can drive transmission line lengths greater than those specified by the PCIe SIG Terminations Device Zo (Ω)Rs (Ω) 9DBL0442 100 None needed 9DBL0452 100 7.5 9DBL04P2 100 Prog. 9DBL0442 85 N/A 9DBL0452 85 None needed 9DBL04P2 85 Prog. |
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