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MC3256 Datasheet(PDF) 28 Page - List of Unclassifed Manufacturers |
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MC3256 Datasheet(HTML) 28 Page - List of Unclassifed Manufacturers |
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28 / 46 page  MC3256 3-Axis Accelerometer Preliminary Datasheet mCube Proprietary. APS-048-0027v1.6 28 / 46 © 2015 mCube Inc. All rights reserved. 11.2 SR: STATUS REGISTER This register contains the flag/event bits for tap detection and sample acquisition. The TAP bits will only transition if the corresponding enable bit has been set in register 0x09, the TAP control register. Each read to this register will clear the latched event(s) and re-arm the flag for the next event. Addr Name Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR Value R/ W 0x03 SR Status Register ACQ_INT Resv TAP_ZN TAP_ZP TAP_YN TAP_YP TAP_XN TAP_XP 0x00 R TAP_XP Positive X-axis TAP detected, flag is set in polling mode or interrupt mode. TAP_XN Negative X-axis TAP detected, flag is set in polling mode or interrupt mode. TAP_YP Positive Y-axis TAP detected, flag is set in polling mode or interrupt mode. TAP_YN Negative Y-axis TAP detected, flag is set in polling mode or interrupt mode. TAP_ZP Positive Z-axis TAP detected, flag is set in polling mode or interrupt mode. TAP_ZN Negative Z-axis TAP detected, flag is set in polling mode or interrupt mode. ACQ_INT Sample has been acquired, flag bit is set in polling mode or interrupt mode. This bit cannot be disabled and is always set be hardware when a sample is ready. The host must poll at the sample rate or faster to see this bit transition. Table 12. SR Status Register |
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