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ADS8325 Datasheet(PDF) 3 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
Part No. ADS8325
Description  16-Bit, High-Speed, 2.7V to 5.5V microPower Sampling ANALOG-TO-DIGITAL CONVERTER
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Maker  BURR-BROWN [Burr-Brown (TI)]
Homepage  http://www.burr-brown.com
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ADS8325 Datasheet(HTML) 3 Page - Burr-Brown (TI)

 
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ADS8325
3
SBAS226A
www.ti.com
ELECTRICAL CHARACTERISTICS: VDD = +5V
Over recommended operating free-air temperature at –40
°C to +85°C, V
REF = +5V, –IN = GND, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise noted.
ADS8325I
ADS8325IB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ANALOG INPUT
Full-Scale Range
FSR
+IN – (–IN)
0
VREF
✻✻
V
Operating Common-Mode Signal
–0.3
0.5
✻✻
V
Input Resistance
–IN = GND
5
G
Input Capacitance
–IN = GND, During Sampling
45
pF
Input Leakage Current
–IN = GND
±50
nA
Differential Input Capacitance
+IN to –IN, During Sampling
20
pF
Full-Power Bandwith
FSBW
fS Sinewave, SINAD at –3dB
20
kHz
DC ACCURACY
Resolution
16
Bits
No Missing Code
NMC
15
16
Bits
Integral Linearity Error
INL
±3
±6
±1.5
±4LSB
Offset Error
VOS
±0.75
±1.5
±0.5
±1mV
Offset Error Drift
TCVOS
±0.2
ppm/
°C
Gain Error
GERR
±24
±12
LSB
Gain Error Drift
TCGERR
±0.3
ppm/
°C
Noise
20
µVRMS
Power-Supply Rejection
4.75V
≤ V
DD ≤ 5.25
3
LSB
SAMPLING DYNAMICS
Conversion Time
tCONV
24kHz < fCLK ≤ 2.4MHz
6.667
666.7
✻✻
µs
Acquisition Time
tAQ
fCLK = 2.4MHz
1.875
µs
Throughout Rate
100
kSPS
Clock Frequency
0.024
2.4
✻✻
MHz
AC ACCURACY
Total Harmonic Distortion
THD
5Vp-p Sinewave, at 1kHz
–100
–106
dB
Spurious-Free Dynamic Range
SFDR
5Vp-p Sinewave, at 1kHz
–100
–108
dB
Signal-to-Noise Ratio
SNR
–90
–91
dB
Signal-to-Noise + Distortion
SINAD
5Vp-p Sinewave, at 1kHz
–90
–91
dB
Effective Number of Bits
ENOB
14.6
14.7
Bits
VOLTAGE REFERENCE INPUT
Reference Voltage
2.5
VDD + 0.3
✻✻
V
Reference Input Resistance
CS = GND, fSAMPLE = 0Hz
5
k
CS = VDD
5
G
Reference Input Capacitance
20
pF
Reference Input Current
1
1.5
✻✻
mA
CS = VDD
0.1
✻✻
µA
DIGITAL INPUTS(1)
Logic Family
CMOS
High-Level Input Voltage
VIH
0.7 • VDD
VDD + 0.3
✻✻
V
Low-Level Input Voltage
VIL
–0.3
0.3 • VDD
✻✻
V
Input Current
IIN
VI = VDD or GND
±50
nA
Input Capacitance
CI
5
pF
DIGITAL OUTPUTS(1)
Logic Family
CMOS
High-Level Output Voltage
VOH
VDD = 4.5V, IOH = –100µA
4.44
V
Low-Level Output Voltage
VOL
VDD = 4.5V, IOL = 100µA
0.5
V
High-Impedance-State Output Current
IOZ
CS = VDD, VI = VDD or GND
±50
nA
Output Capacitance
CO
5
pF
Load Capacitance
CL
30
pF
Data Format
Straight Binary
✻ indicates the same specifications as the ADS8325I.
NOTE: (1) Applies for 5.0V nominal supply: VDD (min) = 4.5V and VDD (max) = 5.5V.


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