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IDT71V3556S Datasheet(PDF) 5 Page - Integrated Device Technology

Part No. IDT71V3556S
Description  128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT71V3556S Datasheet(HTML) 5 Page - Integrated Device Technology

 
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6.42
IDT71V3556, IDT71V3558, 128K x 36, 256K x 18, 3.3V Synchronous SRAMS with
ZBT
™ Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs
Commercial and Industrial Temperature Ranges
5
Recommended Operating
Temperature and Supply Voltage
Pin Configuration - 128K x 36
NOTES:
1. Pins 14, 16 and 66 do not have to be connected directly to VDD as long as the input voltage is
≥ VIH.
2. Pins 83 and 84 are reserved for future 8M and 16M respectively.
3. Pin 64 does not have to be connected directly to VSS as long as the input voltage is
≤ VIL; on the latest die revision this
pin supports ZZ (sleep mode).
Top View
100 TQFP
100 99 98 97 96 95 94 93 92 91 90
87 86 85 84 83 82 81
89 88
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
I/O31
I/O30
VDDQ
VSS
I/O29
I/O28
I/O27
I/O26
VSS
VDDQ
I/O25
I/O24
VSS
VDD
I/O23
I/O22
VDDQ
VSS
I/O21
I/O20
I/O19
I/O18
VSS
VDDQ
I/O17
I/O16
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
I/O14
VDDQ
VSS
I/O13
I/O12
I/O11
I/O10
VSS
VDDQ
I/O9
I/O8
VSS
VDD
I/O7
I/O6
VDDQ
VSS
I/O5
I/O4
I/O3
I/O2
VSS
VDDQ
I/O1
I/O0
5281 drw 02
VDD(1)
I/O15
I/OP3
VDD(1)
I/OP4
I/OP1
VDD(1)
I/OP2
VSS/ZZ(3)
,
Grade
Temperature(1)
VSS
VDD
VDDQ
Commercial
0°C to +70°C
0V
3.3V± 5%
3.3V± 5%
Industrial
-40°C to +85°C
0V
3.3V± 5%
3.3V± 5%
5281 tbl 05
NOTES:
1. TA is the "instant on" case temperature.


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