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DSC400-4422Q0001KI2T Datasheet(PDF) 9 Page - Micrel Semiconductor |
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DSC400-4422Q0001KI2T Datasheet(HTML) 9 Page - Micrel Semiconductor |
9 / 15 page ______________________________________________________________________________________________________________________________________________ DSC400 Page 9 DSC400 Configurable Four Output, Low Jitter Crystal-less™ Clock Generator LVCMOS: Typical Termination Scheme RS is a series resistor implemented to match the trace impedance to that of the clock output. Depending on the board layout, the value may range from 0 to 27Ω LVCMOS Outputs Output Logic Levels Output logic high Output logic low VOH VOL I=±6mA 0.9xVDD - - 0.1xVDD V Output Transition time3 Rise Time Fall Time tR tF 20% to 80% CL=15pF 1.1 1.3 2 2 ns Frequency f0 All temp range except Auto Auto temp range 2.3 170 100 MHz Output Duty Cycle SYM 45 55 % Supply Current – IO2 IDDio Per output at 125MHz, CL=15pF 11 14 mA Period Jitter JPER CLK(0:3) =125MHz 3 psRMS Integrated Phase Noise JPH 200kHz to 20MHz @ 125MHz 100kHz to 20MHz @ 125MHz 12kHz to 20MHz @ 125MHz 0.3 0.38 1.7 2 psRMS |
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