CAT5401

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8

INSTRUCTION AND REGISTER DESCRIPTION

Device Type/Address Byte

The first byte sent to the CAT5401 from the master/

processor is called the Device Address Byte. The most

significant four bits of the Device Type address are a device

type identifier. These bits for the CAT5401 are fixed at

0101[B] (refer to Figure 4).

The two least significant bits in the slave address byte, A1

− A0, are the internal slave address and must match the

physical device address which is defined by the state of the

A1 − A0 input pins for the CAT5401 to successfully continue

the command sequence. Only the device which slave

address matches the incoming device address sent by the

master executes the instruction. The A1 − A0 inputs can be

be set to 0.

Instruction Byte

The next byte sent to the CAT5401 contains the

instruction and register pointer information. The four most

significant bits used provide the instruction opcode I [3:0].

The R1 and R0 bits point to one of the four data registers of

each associated potentiometer. The least two significant bits

point to one of four Wiper Control Registers. The format is

shown in Figure 5.

Table 11. DATA REGISTER SELECTION

Data Register Selected

R1

R0

DR0

0

0

DR1

0

1

DR2

1

0

DR3

1

1

Figure 4. Identification Byte Format

ID3

ID2

ID1

ID0

0

0

A1

A0

01

01

(MSB)

(LSB)

DeviceType

Identifier

SlaveAddress

Figure 5. Instruction Byte Format

I3

I2

I1

I0

R1

R0

P1

P0

(MSB)

(LSB)

WCR/Pot Selection

Instruction

Opcode

Data Register

Selection

WIPER CONTROL AND DATA REGISTERS

Wiper Control Register (WCR)

The CAT5401 contains four 6-bit Wiper Control

Registers, one for each potentiometer. The Wiper Control

Register output is decoded to select one of 64 switches along

its resistor array. The contents of the WCR can be altered in

four ways: it may be written by the host via Write Wiper

Control Register instruction; it may be written by

transferring the contents of one of four associated Data

Registers via the XFR Data Register instruction, it can be

modified one step at a time by the Increment/decrement

instruction (see Instruction section for more details).

Finally, it is loaded with the content of its data register zero

(DR0) upon power-up.

The Wiper Control Register is a volatile register that loses

its contents when the CAT5401 is powered-down. Although

the register is automatically loaded with the value in DR0

upon power-up, this may be different from the value present

at power-down.

Data Registers (DR)

Each potentiometer has four 6-bit non-volatile Data

Registers. These can be read or written directly by the host.

Data can also be transferred between any of the four Data

Registers and the associated Wiper Control Register. Any

data changes in one of the Data Registers is a non−volatile

operation and will take a maximum of 5 ms.

Write In Process

The contents of the Data Registers are saved to

nonvolatile memory when the CS input goes HIGH after a

write sequence is received. The status of the internal write

cycle can be monitored by issuing a Read Status command

to read the Write in Process (WIP) bit.

Instructions

Four of the nine instructions are three bytes in length.

These instructions are: