Si9105

Vishay Siliconix

www.vishay.com

6

Document Number: 70003

S-42030—Rev. H, 15-Nov-04

DETAILED DESCRIPTION

Pre-Regulator/Start-Up Section

Due to the low quiescent current requirement of the Si9105

control circuitry, bias power can be supplied from the

unregulated input power source, from an external regulated

low-voltage supply, or from an auxiliary “bootstrap” winding on

the output inductor or transformer.

constant current. The magnitude of this current is determined

by a high-voltage depletion MOSFET device which is

provides initial power to the IC by charging an external bypass

nominal value of 9.3 V by the pre-regulator circuit.

As the supply voltage rises toward the normal operating

conditions, an internal undervoltage (UV) lockout circuit keeps

undervoltage lockout threshold (typically 8.7 V). This

guarantees that the control logic will be functioning properly

and that sufficient gate drive voltage is available before the

MOSFET turns on. The design of the IC is such that the

undervoltage lockout threshold will not exceed the

pre-regulator turn-off voltage. Power dissipation can be

that the constant current source is always disabled.

BIAS

To properly set the bias for the Si9105, a 820-kW resistor

magnitude of bias current in all of the analog sections and the

pull-up current for the SHUTDOWN and RESET pins. The

current flowing in the bias resistor is nominally 7.5 mA.

Reference Section

The reference section of the Si9105 consists of a temperature

compensated buried zener and trimmable divider network.

The output of the reference section is connected internally to

the non-inverting input of the error amplifier. Nominal reference

output voltage is 4 V. The trimming procedure that is used on

the Si9105 brings the output of the error amplifier (which is

configured for unity gain during trimming) to within "1% of 4 V.

This automatically compensates for the input offset voltage in

the error amplifier.

The output impedance of the reference section has been

purposely made high so that a low impedance external voltage

source can be used to override the internal voltage source, if

desired, without otherwise altering the performance of the

device.

Error Amplifier

Closed-loop regulation is provided by the error amplifier,

whose 1-kW dynamic output impedance enables it to be used

with feedback compensation (unlike transconductance

amplifiers). A MOS differential input stage provides for low

input current. The noninverting input to the error amplifier

supply and should be bypassed with a small capacitor to

ground.

Oscillator Section

The oscillator consists of a ring of CMOS inverters, capacitors,

and a capacitor discharge switch. Frequency is set by an

external resistor between the OSC IN and OSC OUT pins.

(See Typical Characteristics graph of resistor value vs.

normal internal oscillator operation. A frequency divider in the

logic section limits switch duty cycle to a maximum of 50% by

locking the switching frequency to one half of the oscillator

frequency.

Remote synchronization can be accomplished by capacitive

coupling of a synchronization pulse into the OSC IN terminal.

For a 5-V pulse amplitude and 0.5-ms pulse width, typical

values would be 100 pF in series with 3 kW to OSC IN.