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LM2412 Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. LM2412
Description  Monolithic Triple 2.8 ns CRT Driver
Download  11 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2412 Datasheet(HTML) 5 Page - National Semiconductor (TI)

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Application Hints (Continued)
above 300 MHz. Air core inductors from J.W. Miller Magnet-
ics (part #75F518MPC) were used for optimizing the perfor-
mance of the device in the NSC application board. The val-
ues shown in
Figure 9 can be used as a good starting point
for the evaluation of the LM2412.
Effect of Load Capacitance
The output rise and fall times as well as overshoot will vary
as the load capacitance varies. The values of the output cir-
cuit (R1, R2 and L1 in
Figure 9) should be chosen based on
the nominal load capacitance. Once this is done the perfor-
mance of the design can be checked by varying the load
based on what the expected variation will be during produc-
tion.
Effect of Offset
Figure 7 shows the variation in rise and fall times when the
output offset of the device is varied from 35 to 55 V
DC. The
rise and fall times show about the same overall variation.
The slightly slower fall time is fastest near the center point of
45V, making this the optimum operating point. At the low and
high output offset range, the characteristic of rise/fall time is
slower due to the saturation of Q3 and Q4. The recovery
time of the output transistors takes longer coming out of
saturation thus slows down the rise and fall times.
THERMAL CONSIDERATIONS
Figure 4 shows the performance of the LM2412 in the test
circuit shown in
Figure 2 as a function of case temperature.
Figure 4 shows that both the rise and fall times of the
LM2412 become slightly longer as the case temperature in-
creases from 40˚C to 125˚C. In addition to exceeding the
safe operating temperature, the rise and fall times will typi-
cally exceed 3 nsec. Please note that the LM2412 is never
to be operated over a case temperature of 100˚C. In addi-
tion to exceeding the safe operating temperature, the rise
and fall times will typically exceed 3 nsec.
Figure 6 shows the total power dissipation of the LM2412 vs.
Frequency when all three channels of the device are driving
an 8 pF load. Typically the active time is about 72% of the to-
tal time for one frame. Worst case power dissipation is when
a one on, one off pixel is displayed over the active time of the
video input. This is the condition used to measure the total
power disspation of the LM2412 at different input frequen-
cies.
Figure 6 gives all the information a monitor designer
normally needs for worst case power dissipation. However, if
the designer wants to calculate the power dissipation for an
active time different from 72%, this can be done using the in-
formation in
Figure 14. The recommended input black level
voltage is 1.9V. From
Figure 14, if a 1.9V input is used for
the black level, then power dissipation during the inactive
video time is 2.7W. This includes both the 80V and 12V sup-
plies.
If the monitor designer chooses to calculate the power dissi-
pation for the LM2412 using an active video time different
from 72%, then he needs to use the following steps when us-
ing a 1.9V input black level:
1.
Multiply the black level power dissipation, 2.7W, by 0.28,
the result is 0.8W.
2.
Choose the maximum frequency to be used. A typical
application would use 100 MHz, or a 200 MHz pixel
clock. The power dissipation is 13.8W.
3.
Subtract the 0.8W from the power dissipation from
Fig-
ure 6. For 100 MHz this would be 13.8 – 0.8 = 13.0W.
4.
Divide the result from step 3 by 0.72. For 100 MHz, the
result is 18.1W.
5.
Multiply the result in 4 by the new active time percent-
age.
6.
Multiply 2.7W by the new inactive time.
7.
Add together the results of steps 5 and 6. This is the ex-
pected power dissipation for the LM2412 in the design-
er’s application.
The LM2412 case temperature must be maintained below
100˚C. If the maximum expected ambient temperature is
70˚C and the maximum power dissipation is 13.8W (from
Figure 6. 100MHz) then a maximum heat sink thermal resis-
tance can be calculated:
TYPICAL APPLICATION
A typical application of the LM2412 is shown in
Figure 10.
Used in conjunction with three LM2202s, a complete video
channel from monitor input to CRT cathode can be achieved.
Performance is excellent for resolutions up to 1600 x 1200
and pixel clock frequencies at 200 MHz.
Figure 10 is the
schematic for the NSC demonstration board that can be
used to evaluate the LM2202/LM2412 combination in a
monitor.
PC Board Layout Considerations
For optimum performance, an adequate ground plane, isola-
tion between channels, good supply bypassing and minimiz-
ing unwanted feedback are necessary. Also, the length of the
signal traces from the preamplifier to the LM2412 and from
the LM2412 to the CRT cathode should be as short as pos-
sible. The red video trace from the buffer transistor to the
LM2412 input is about the absolute maximum length one
should consider on a PCB layout. If possible the traces
should actually be shorter than the red video trace. The fol-
lowing references are recommended for video board design-
ers:
Ott, Henry W., “Noise Reduction Techniques in Electronic
Systems”, John Wiley & Sons, New York, 1976.
“Guide to CRT Video Design”, National Semiconductor Appli-
cation Note 861.
“Video Amplifier Design for Computer Monitors”, National
Semiconductor Application Note 1013.
Pease,
Robert A.,
“Troubleshooting Analog
Circuits”,
Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may os-
cillate in a monitor if feedback occurs around the video chan-
nel through the chassis wiring. To prevent this, leads to the
video amplifier input circuit should be shielded, and input cir-
cuit wiring should be spaced as far as possible from output
circuit wiring.
NSC Demonstration Board
Figures 11, 12 show routing and component placement on
the NSC LM2202/2412 demonstration board. The schematic
of the board is shown in
Figure 10. This board provides a
good example of a layout that can be used as a guide for fu-
ture layouts. Note the location of the following components:
C47 -V
CC bypass capacitor, located very close to pin 6
and ground pins. (
Figure 12)
C49 -V
BB bypass capacitor, located close to pin 10 and
ground. (
Figure 12)
www.national.com
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