NB100ELT23L

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2

1

2

3

45

6

7

8

Q0

GND

Figure 1. 8−Lead Pinout (Top View) and

Logic Diagram

D0

Q1

D1

D1

D0

LVPECL

LVTTL

Table 1. PIN DESCRIPTION

PIN

FUNCTION

Q0, Q1

LVTTL Outputs

D0*, D1*

D0**, D1**

Differential LVPECL Inputs

Positive Supply

GND

Ground

common termination voltage under no signal conditions, then the

device will be susceptible to self−oscillation.

common termination voltage under no signal conditions, then the

device will be susceptible to self−oscillation. See AND8020,

Section 6 for options.

Table 2. ATTRIBUTES

Characteristics

Value

Internal Input Pulldown Resistor

D

D

50 k

W

75 k

W

Internal Input Pullup Resistor

50 k

W

ESD Protection

Human Body Model

Machine Model

Charged Device Model

> 1.5 kV

> 100 V

> 2 kV

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

Pb−Free Pkg

SO−8

TSSOP−8

Level 1

Level 3

Flammability Rating

Oxygen Index: 28 to 34

UL 94 V−0 @ 1.25 in

Transistor Count

91 Devices

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.