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NB4L339 Datasheet(PDF) 2 Page - ON Semiconductor

Part No. NB4L339
Description  2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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NB4L339 Datasheet(HTML) 2 Page - ON Semiconductor

 
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NB4L339
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Figure 2. Detailed Logic Diagram
DIVSEL
CLKSEL
CLKA
VTA
CLKA
CLKB
VTB
CLKB
EN
MR
50−W
50−W
50−W
50−W
EXAMPLE: fin = 622.08 MHz
A
÷1 / ÷2
R
B
÷2
R
C
÷4
R
D
÷8
R
EN
QA0
QA0
QA1
QA1
A
foutA = 622.08 MHz
or 311.04 MHz
QB0
QB0
QB1
QB1
B
foutB = 311.04 MHz
QC0
QC0
QC1
QC1
C
foutC = 155.52 MHz
QD0
QD0
QD1
QD1
D
foutD = 77.76 MHz
CLKSEL*
CLK Input Selected
0
CLKA
1
CLKB
Table 1. Input Select Function Table
DIVSEL*
QA Divide
0
Divide by 1
1
Divide by 2
Table 2. Divider Select Function Table
CLK Input
Function
Low to High Transition
Divide − Outputs Active
High to Low Transition
Hold Q − Outputs Inactive
Table 3. Clock Enable/Disable Function Table
X (Don’t Care)
EN*MR**
H
0
H
1
L
X (Don’t Care)
Reset Q
* Pin will default LOW when left OPEN.
** Pin will default HIGH when left OPEN.
Figure 3. Pinout QFN−32 (Top View)
NB4L339
QB0
QB0
QB1
QB1
QC0
QC0
QC1
QC1
VEE
CLKA
VTA
CLKA
CLKB
VTB
CLKB
VEE
Exposed Pad (EP)
32 31 30 29 28 27 26 25
9
10 11 121314 1516
8
7
6
5
4
3
2
1
17
18
19
20
21
22
23
24


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