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SIC645 Datasheet(PDF) 7 Page - Vishay Siliconix

Part No. SIC645
Description  60 A VRPower Smart Power Stage (SPS) Module with Integrated High-Accuracy Current and Temperature Monitors
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Maker  VISHAY [Vishay Siliconix]
Homepage  http://www.vishay.com
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SIC645 Datasheet(HTML) 7 Page - Vishay Siliconix

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SiC645
www.vishay.com
Vishay Siliconix
S16-2233-Rev. B, 31-Oct-16
7
Document Number: 65424
For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
ELECTRICAL SPECIFICATIONS
(recommended operating conditions, unless otherwise noted. TJ = -40 °C to +125 °C)
PARAMETER
SYMBOL
TEST CONDITIONS
LIMITS
UNIT
MIN. a
TYP.
MAX. a
POWER RATING
Maximum instant power dissipation
TA = 25 °C, 150 A b
-100
-
W
Maximum continuous power dissipation
TA = 25 °C, JA = 10 °C/W, TJ = 150 °C b
-
12.5
-
THERMAL RESISTANCE
Thermal resistance junction to PCB
JB
b
-5.2
-
°C/W
Thermal resistance junction to ambient
JA
0 LFM b
-
10.7
-
400 LFM b
-9.3
-
VCC SUPPLY CURRENT
Logic standby current
IVCC
PWM = open
-
4.75
-
mA
Gate drive standby current
IPVCC
PWM = open
-
100
-
μA
Logic operational current
IVCC
PWM = 300 kHz
-
4.75
-
mA
Gate drive operational current
IPVCC
PWM = 300 kHz
-
15
-
POWER-ON RESET AND ENABLE
VCC rising POR threshold
-
3.86
4.20 c
V
VCC falling POR threshold
3.20 c
3.58
-
VCC POR hysteresis
-280
-
mV
VCC POR delay to operation
-
125
197 c
μs
VIN rising POR threshold
-
4
4.2 c
V
VIN falling POR threshold
3.4 c
3.5
-
VIN POR hysteresis
-445
-
mV
3.3 V PWM INPUT
(see “Timing Diagram”)
Sink impedance
-
33.5
-
k
Source impedance
-
16.5
-
Tri-state lower gate falling threshold
VCC = 5 V
-1.11
-
V
Tri-state lower gate rising threshold
-
0.87
-
Tri-state upper gate rising threshold
-
2.13
-
Tri-state upper gate falling threshold
-
1.95
-
Tri-state shutdown window
1.3 c
-1.8 c
5 V PWM INPUT
(see “Timing Diagram”)
Sink impedance
-
16.5
-
k
Source impedance
-
16.5
-
Tri-state lower gate falling threshold
VCC = 5 V
-1.51
-
V
Tri-state lower gate rising threshold
-
1.14
-
Tri-state upper gate rising threshold
-
3.24
-
Tri-state upper gate falling threshold
-
3.02
-
Tri-state shutdown window
1.6 c
-2.8 c
SWITCHING TIME
GH turn-on propagation delay
tPDHU
GL low to GH high, see Fig. 6
-
8
-
ns
GH turn-off propagation delay
tPDLU
PWM low to GH low, see Fig. 6
-
40
-
GL turn-on propagation delay
tPDHL
GH low to GL high, see Fig. 6
-
8
-
GL turn-off propagation delay
tPDLL
PWM high to GL low, see Fig. 6
-
23
-
GL exit tri-state propagation delay
tPDTSL
Tri-state to GL high), see Fig. 6
-
25
-
GH exit tri-state propagation delay
tPDTSU
Tri-state to GH high, see Fig. 6
-
35
-
PWML tri-state shutdown hold-off time
tTSSHDL
PWM low to GL low, see Fig. 6
-
40
-
PWMH tri-state shutdown hold-off time
tTSSHDU
PWM low to GH low, see Fig. 6
-
50
-


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