TMS28F512A

65536 BY 8-BIT

FLASH MEMORY

SMJS514C – FEBRUARY 1994 – REVISED AUGUST 1997

6

POST OFFICE BOX 1443

command register

The command register controls the program and erase functions of the TMS28F512A. The algorithm-selection

is high, the contents of the command register and the function being performed can be changed. The command

register is written to when E is low and W is pulsed low. The address is latched on the leading edge of the pulse,

while the data is latched on the trailing edge. Accidental programming or erasure is minimized because two

commands must be executed to invoke either operation.

power supply considerations

Each device should have a 0.1-

power supplies should be appropriate to handle the current demand.

command definitions

See Table 3 for command definitions.

Table 3. Command Definitions

COMMAND

REQUIRED

BUS

FIRST BUS CYCLE

SECOND BUS CYCLE

COMMAND

BUS

CYCLES

OPERATION†

ADDRESS

DATA

OPERATION†

ADDRESS

DATA

Read

1

Write

X

00h

Read

RA

RD

Algorithm-Selection Mode

3

Write

X

90h

Read

0000

0001

89h

B8h

Set-Up-Erase / Erase

2

Write

X

20h

Write

X

20h

Erase Verify

2

Write

EA

A0h

Read

X

EVD

Set-Up-Program / Program

2

Write

X

40h

Write

PA

PD

Program Verify

2

Write

X

C0h

Read

X

PVD

Reset

2

Write

X

FFh

Write

X

FFh

† Modes of operation are defined in Table 1

Legend:

EA

Address of memory location to be read during erase verify

EVD

Data read from location EA during erase verify

PA

Address of memory location to be programmed. Address is latched on the falling edge of W.

PD

Data to be programmed at location PA. Data is latched on the rising edge of W.

PVD

Data read from location PA during program verify

RA

Address of memory location to be read

RD

Data read from location RA during the read operation

read command

register invokes the read operation. When the device is powered up, the default contents of the command

register are 00h and the read operation is enabled. The read operation remains enabled until a different valid

command is written to the command register.

algorithm-selection-mode command

The algorithm-selection mode is activated by writing 90h into the command register. The manufacturer

equivalent code (89h) is identified by the value read from address location 0000h, and the device equivalent

code (B8h) is identified by the value read from address location 0001h.