EXAR Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com • uarttechsupport@exar.com

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XR16C2850

3.3V AND 5V DUART WITH 128-BYTE FIFO

APRIL 2002

REV. 2.0.0

GENERAL DESCRIPTION

sal asynchronous receiver and transmitter (UART).

Enhanced features include 128 bytes of TX and RX

FIFOs, programmable TX and RX FIFO trigger level,

FIFO level counters, automatic (RTS/CTS) hardware

and (Xon/Xoff) software flow control, automatic RS-

485 half duplex direction control output and data rates

up to 6.25 Mbps at 5V and 8X sampling clock. On-

board status registers provide the user with opera-

tional status and data error flags. An internal loop-

back capability allows system diagnostics. The 2850

has a full modem interface and can operate at 3.3 V

or 5 V and is pin-to-pin compatible to Exar’s

ST16C2550 and XR16C2750 except the 48-TQFP

package. The 2850 register set is compatible to the

industry standard ST16C2550 and is available in 48-

pin TQFP, 44-pin PLCC and 40-pin PDIP packages.

The 40-pin package does not offer TXRDY# and

RXRDY# pins (DMA signal monitoring) otherwise the

three package versions are the same.

APPLICATIONS

• Portable Appliances

• Telecommunication Network Routers

• Ethernet Network Routers

• Cellular Data Devices

• Factory Automation and Process Controls

FEATURES

• Pin-to-pin compatible and functionally compatible to

Exar’s ST16C2550 and XR16L2750 and TI’s

TL16C752B on the 44-PLCC package

• Pin-alike Exar’s XR16L2750 and ST16C2550 48-

TQFP package but with additional CLK8/16, CLK-

SEL and HDCNTL inputs

• Two independent UART channels

• Register set compatible to 16C550

• Up to 6.25 Mbps at 5V, and 4 Mbps at 3.3V

• Transmit and Receive FIFOs of 128 bytes

• Programmable TX and RX FIFO Trigger Levels

• Transmit and Receive FIFO Level Counters

• Automatic Hardware (RTS/CTS) Flow Control

• Selectable Auto RTS Flow Control Hysteresis

• Automatic Software (Xon/Xoff) Flow Control

• Automatic RS-485 Half-duplex Direction Control

Output

• Wireless Infrared (IrDA 1.0) Encoder/Decoder

• Automatic sleep mode

• Full modem interface

• Device Identification and Revision

• Crystal oscillator or external clock input

• Industrial and commercial temperature ranges

• 48-TQFP and 44-PLCC packages

XTAL1

XTAL2

Crystal Osc/Buffer

TXA, RXA, DTRA#,

DSRA#, RTSA#,

DTSA#, CDA#, RIA#,

OP2A#

8-bit Data

Bus

Interface

UART Channel A

128 Byte TX FIFO

128 Byte RX FIFO

BRG

IR

ENDEC

TX & RX

UART

Regs

3.3V or 5V VCC

GND

TXB, RXB, DTRB#,

DSRB#, RTSB#,

CTSB#, CDB#, RIB#,

OP2B#

UART Channel B

(same as Channel A)

A2:A0

D7:D0

CSA#

CSB#

INTA

INTB

IOW#

IOR#

Reset

TXRDYA#

TXRDYB#

RXRDYA#

RXRDYB#

CLK8/16

CLKSEL

HDCNTL#