NB3F8L3005C

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9

Differential Input with Single−Ended Interconnect

Refer to Figure 5 to interconnect a single−ended to a

Bypass capacitor (C1) can filter noise on the DC bias. This

bias circuit should be located as close to the input pin as

possible. Adjust R1 and R2 to common mode voltage of the

signal input swing to preserve duty cycle.

This configuration requires that the sum of the output

impedance of the driver (Ro) and the series resistance (Rs)

equals the transmission line impedance. In addition,

matched termination by R1 and R2 will attenuate the signal

amplitude in half. Termination may be done by using Rs or

by using R1 and R2. First, Rs = 0 and then R3 and R4 in

parallel should equal the transmission line impedance. For

most 50

W applications, R1 and R2 can be 100 W. The

differential input can handle full rail LVCMOS signaling,

but it is recommended that the amplitude be reduced. The

datasheet specifies a differential amplitude which needs to

and guaranteed by using a differential signal.

Single

C1

0.1

mF

R2

100

W

GND = 0.0

R1

100

W

Ended

Driver

GND = 0.0

GND = 0.0

R4

1 k

W

R3

1 k

W

Differential In

CLKx

CLKx

Figure 5. Differential Input with Single−ended Interconnect

Crystal Input Interface

The device has been characterized with 18 pF parallel

resonant crystals. The capacitor values, C1 and C2, shown

in Figure 6 below as 15 pF were determined using an 18 pF

parallel resonant crystal and were chosen to minimize the

ppm error. The optimum C1 and C2 values can be slightly

adjusted for different board layouts.

Figure 6. Crystal Input Interface

CLOCK Overdriving the XTAL Interface

The XTAL_IN input can accept a single−ended LVCMOS

signal through an AC coupling capacitor. A general

LVCMOS interface diagram is shown in Figure 7 and a

general LVPECL interface in Figure 8. The XTAL_OUT

pin must be left floating. The maximum amplitude of the

input signal should not exceed 2 V and the input edge rate

can be as slow as 10 ns. This configuration requires that the

output impedance of the driver (Ro) plus the series

resistance (Rs) equals the transmission line impedance. In

addition, matched termination at the crystal input will

attenuate the signal in half. This can be done in one of two

ways. First, R1 and R2 in parallel should equal the

transmission line impedance. For most 50

W applications,

R1 and R2 can be 100

W. This can also be accomplished by

removing R1 and making R2 50

W. By overdriving the

crystal oscillator, the device will be functional, but note, the

device performance is guaranteed by using a quartz crystal.