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74LVC2G125DCTRE6 Datasheet(PDF) 1 Page - Texas Instruments |
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74LVC2G125DCTRE6 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 13 page www.ti.com FEATURES DCT OR DCU PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5 1OE 1A 2Y GND VCC 2OE 1Y 2A 4 3 2 1 5 6 7 8 GND 2Y 1A 1OE 2A 1Y 2OE VCC YEA, YEP, YZA, OR YZP PACKAGE (BOTTOM VIEW) DESCRIPTION/ORDERING INFORMATION SN74LVC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES204K – APRIL 1999 – REVISED JUNE 2005 • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.3 ns at 3.3 V • Low Power Consumption, 10- µA Max I CC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) The SN74LVC2G125 is a dual bus buffer gate, designed for 1.65-V to 5.5-V VCC operation. This device features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoStar™ – WCSP (DSBGA) SN74LVC2G125YEAR 0.17-mm Small Bump – YEA NanoFree™ – WCSP (DSBGA) SN74LVC2G125YZAR 0.17-mm Small Bump – YZA (Pb-free) Reel of 3000 _ _ _CM_ NanoStar™ – WCSP (DSBGA) SN74LVC2G125YEPR 0.23-mm Large Bump – YEP –40°C to 85°C NanoFree™ – WCSP (DSBGA) SN74LVC2G125YZPR 0.23-mm Large Bump – YZP (Pb-free) SSOP – DCT Reel of 3000 SN74LVC2G125DCTR C25_ _ _ Reel of 3000 SN74LVC2G125DCUR VSSOP – DCU C25_ Reel of 250 SN74LVC2G125DCUT (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1999–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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