SN74LVCE161284

19BIT IEEE 1284 TRANSLATION TRANSCEIVER

WITH ERRORFREE POWER UP

SCES541 − JANUARY 2004

4

POST OFFICE BOX 655303

Auto-Power-Up

Q

R

D

C

Timer

OUT

A13

A12

A11

A10

A9

Active Input Detection Circuit

VCC and VCC CABLE

An (one of A9−A13)

Y9−Y13 Other Than Yn

50% VCC

50% VCC CABLE

Initial Activation Time

NOTE A: One of A9−A13 is switched as shown above, and the other four inputs are forced to low state.

VCC = 3.3 V

VCC CABLE = 5 V

TA = 25°C

TYP = 80 ns

700 ns (TYP)

Figure 1. Error-Free Circuit Timing