FEDL7204-003-01 datasheet(6/214 Pages) LAPIS | VoIP CODEC

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FEDL7204-003-01 Datasheet(PDF) 6 Page - LAPIS Semiconductor Co., Ltd.

Part #	FEDL7204-003-01

Description	VoIP CODEC

Download	214 Pages

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Manufacturer	LAPIS [LAPIS Semiconductor Co., Ltd.]

Direct Link	http://www.lapis-semi.com/

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FEDL7204-003-02

ML7204-003

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Pin

QFP64

Symbol

I/O

When

PDNB

= “0”

Description

25

D8

I/O

I

Data input-output. Fix the input to “L” or “H” when using

the pin in 8-bit bus access (BW_SEL = ”1”).

26

D9

I/O

I

Data input-output. Fix the input “L” or “H” when using the

pin in 8-bit bus access (BW_SEL = ”1”).

27

D10

I/O

I

Data input-output. Fix the input “L” or “H” when using the

pin in 8-bit bus access (BW_SEL = ”1”).

28

D11

I/O

I

Data input-output. Fix the input “L” or “H” when using the

pin in 8-bit bus access (BW_SEL = ”1”).

29

D12

I/O

I

Data input-output. Fix the input “L” or “H” when using the

pin in 8-bit bus access (BW_SEL = ”1”).

30

D13

I/O

I

Data input-output. Fix the input “L” or “H” when using the

pin in 8-bit bus access (BW_SEL = ”1”).

31

D14

I/O

I

Data input-output. Fix the input “L” or “H” when using the

pin in 8-bit bus access (BW_SEL = ”1”).

32

D15

I/O

I

Data input-output. Fix the input “L” or “H” when using the

pin in 8-bit bus access (BW_SEL = ”1”).

33

DVDD1

—

—

Digital power supply

34

A0

I

I

Address input

35

A1

I

I

Address input

36

A2

I

I

Address input

37

A3

I

I

Address input

38

A4

I

I

Address input

39

A5

I

I

Address input

40

A6

I

I

Address input

41

A7

I

I

Address input

42

PDNB

I

“0”

Power-down input

“0”: Power-down reset

”1”: Normal operation

43

CLKSEL

I

I

SYNC/BCLK input-output control input

“0”: SYNC/BCLK are configured to be input

“1”: SYNC/BCLK are configured to be output

44

DGND1

—

—

Digital ground (0.0 V)

45

GPIOA[0]/DPI

I/O

I

General-purpose I/O port A[0] [5 V tolerant pin]

Secondary function: Input pin for dial pulse detection

46

GPIOA[1]

I/O

I

General-purpose I/O port A[1] [5 V tolerant pin]

47

GPIOA[2]/DPO

I/O

I

General-purpose I/O port A[2] [5 V tolerant pin]

Secondary function: Output pin for dial pulse transmission

48

GPIOA[3]

I/O

I

General-purpose I/O port A[3] [5 V tolerant pin]

49

AVDD

—

—

Analog power supply

50

AIN0P

I

I

AMP0 non-inverting input

51

AIN0N

I

I

AMP0 inverted input

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