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SiW3000
60 0049 R01Drf SiW3000 Radio Processor DS
General System Requirements
System Reference Clock
The SiW3000 chip can use either an external crystal or a reference clock as the system clock input. The supported fre-
quencies are: 9.6 MHz, 12 MHz, 12.8 MHz, 13 MHz, 14.4 MHz, 15.36 MHz, 16 MHz, 16.8 MHz, 19.2 MHz, 19.68 MHz,
19.8 MHz, 26 MHz, 32 MHz, 38.4 MHz, and 48 MHz. The default reference frequency can be selected by setting the
proper system configuration parameter in the non-volatile memory (NVM). If the USB HCI transport will be used, the ref-
erence clock must be 32 MHz.
The system reference crystal/clock must have accuracy of ±20 PPM or better to meet the specification of Bluetooth. To
facilitate design and production, the SiW3000 processor incorporates internal crystal calibration circuits to allow factory
calibration of initial crystal frequency accuracy.
Low Power Clock
For the Bluetooth low power clock, a 32.768-kHz crystal may be used to drive the SiW3000 oscillator circuit, or alterna-
tively, a 32.768-kHz reference clock signal can be used instead of a crystal. If the lowest power consumption is not
required during low-power modes such as sniff, hold, park, and idle modes, the 32.768-kHz crystal may be omitted in the
design. If the 32.768-kHz clock source will be used, the clock source should be connected to the CLK32_IN pin and must
meet the following requirements:
•
For AC-coupled via 100 pF or greater (peak-to-peak voltage):
400 mVP-P < CLK32_IN < VDD_C
•
For DC-coupled:
CLK32_IN minimum peak voltage < VIL
CLK32_IN maximum peak voltage > VIH
Where VIL = 0.3 * VDD_C
Where VIH = 0.7 * VDD_C
For both cases, the signal is not to exceed:
-0.3 V < CLK32_IN < VDD_C + 0.3 V
Also, the CLK32_OUT pin must be coupled to VDD_P or GND through a 100 nF capacitor.
Power Supply Description
The SiW3000 Radio Processor operates at 1.8 V core voltage for internal analog and digital circuits. The chip has inter-
nal analog and digital voltage regulators simplifying power supply requirements to the chip. The internal voltage regula-
tors can be supplied directly from a battery or from other system voltage sources. Optionally, the internal regulators can
be by-passed if 1.8 V regulated source is available on the system.
Note: Both regulators can be bypassed if external regulation is desired. When bypassing the analog regulator, the VBATT_ANA and VCC_OUT pins
must be tied together and the external analog voltage (1.8 V) should be applied to the VBATT_ANA pin. When bypassing the digital regulator, the
VBATT_DIG pin should be left unconnected and the external digital voltage (1.8 V) should be applied to VBB_OUT pin.
The power for the I/Os is taken from a separate source (VDD_P). VDD_P can range from 1.62 to 3.63 Volts to maintain
compatibility with a wide range of peripheral devices. Please check the pin list for the exact pins that are powered from
the VDD_P source. Power for the USB circuits is taken from a separate source (VDD_USB).
Function
Internal Analog Regulator
Internal Digital Regulator
Regulator input pin
VBATT_ANA = 2.3 to 3.63 V
VBATT_DIG = 2.3 to 3.63 V
Regulator output pin
VCC_OUT = 1.8 V
VDD_C = 1.8 V
Table 1. Internal Regulator Used
Function
Analog Core Circuits
Digital Core Circuits
Circuit voltage supply pin
VCC = 1.8 V
VDD_C = 1.8 V
Table 2. Internal Regulator Bypassed
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