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TPS54312 Datasheet(PDF) 4 Page - Texas Instruments |
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TPS54312 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 21 page  TPS54310-EP SLVS818 – APRIL 2008 ..................................................................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS (continued) TJ = –55°C to 125°C, VIN = 3 V to 6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OSCILLATOR SYNC ≤ 0.8 V, RT open 255 350 450 Internally set free-running frequency range kHz SYNC ≥ 2.5 V, RT open 400 550 700 RT = 180 k Ω (1% resistor to AGND)(4) 245 280 313 Externally set free-running frequency range RT = 100 k Ω (1% resistor to AGND) 450 500 550 kHz RT = 68 k Ω (1% resistor to AGND) 650 700 775 High-level threshold voltage, SYNC 2.5 V Low-level threshold voltage, SYNC 0.8 V Pulse duration, SYNC(5) 50 Frequency range, SYNC(5) 330 700 kHz Ramp valley(4) 0.75 V Ramp amplitude (peak-to-peak)(4) 1 V Minimum controllable on time 200 ns Maximum duty cycle 90% ERROR AMPLIFIER Error amplifier open loop voltage gain 1 k Ω COMP to AGND(5) 90 110 dB Error amplifier unity gain bandwidth Parallel 10 k Ω, 160 pF COMP to AGND(5) 3 5 MHz Error amplifier common-mode input voltage range Powered by internal LDO(5) 0 VBIAS V IIB Input bias current, VSENSE VSENSE = Vref 60 250 nA VO Output voltage slew rate (symmetric), COMP 1.4 V/µs PWM COMPARATOR PWM comparator propagation delay time, PWM 10 mV overdrive(5) 70 85 ns comparator input to PH pin (excluding dead time) SLOW-START/ENABLE Enable threshold voltage, SS/ENA 0.82 1.20 1.45 V Enable hysteresis voltage, SS/ENA(4) 0.03 V Falling edge deglitch, SS/ENA(4) 2.5 µs Internal slow-start time 2.2 3.35 4.1 ms Charge current, SS/ENA SS/ENA = 0 V 2.5 5 8 µA Discharge current, SS/ENA SS/ENA = 0.2 V, VI = 2.7 V 1.2 2.3 4 mA POWER GOOD Power good threshold voltage VSENSE falling 90 %Vref Power good hysteresis voltage(4) 3 %Vref Power good falling edge deglitch(4) 35 µs Output saturation voltage, PWRGD I(sink) = 2.5 mA 0.18 0.30 V Leakage current, PWRGD VI = 5.0 V 1 µA CURRENT LIMIT VI = 3 V, output shorted (5) 4 6.5 Current limit trip point A VI = 6 V, output shorted (5) 4.5 7.5 Current limit leading edge blanking time(4) 100 ns Current limit total response time(4) 200 ns THERMAL SHUTDOWN Thermal shutdown trip point(4) 135 150 165 °C Thermal shutdown hysteresis(4) 10 °C OUTPUT POWER MOSFETS IO = 0.5 A, VI = 6 V (6) 59 88 rDS(on) Power MOSFET switches m Ω IO = 0.5 A, VI = 3 V (6) 85 136 (4) Specified by design (5) Specified by design for TJ = -40°C to 125°C (6) Matched MOSFETs, low side rDS(on) production tested, high side rDS(on) specified by design. 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS54310-EP |
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