Micrel, Inc.

DSC2011FM2-E0015

Operational Description

The DSC2011FM2-E0015 is a dual output LVCMOS

oscillator consisting of a MEMS resonator and a

supporting PLL IC. The two LVCMOS outputs

are generated through independent 8-bit programmable

dividers from the output of the internal PLL. The two

constraints are imposed on the output frequencies:

1) f2 = M x f1/N, where M and N are even integers

between 4 and 254, 2) 1.2GHz < N x f2 < 1.7GHz.

The actual frequencies output by DSC2011FM2-E0015

are controlled by an internal pre-programmed memory

(OTP). This memory stores all coefficients required by

the PLL for up to eight different frequency combinations.

Three control pins (FS0 - FS2) select the output frequency

combination.

DSC2011FM2-E0015 has independent control of the output

voltage levels of the two outputs. The high voltage level of

CLK1 is equal to the main supply voltage, VDD (pin 13).

VDD2 (pin 12) sets the high voltage level of CLK2.

VDD2 must be equal to or less than VDD at all times to

insure proper operation. VDD2 can be as low as 1.65V.

When OE (pin 1) is floated or connected to VDD, the

DSC2011FM2-E0015 is in operational mode. Driving

Enable to ground will tri-state both output drivers

(hi-impedance mode).

DSC2011FM2-E0015 has programmable output drive

strength for each output. Using two control pins (OXS0-

OXS1) for each output, the drive strength can be indepen-

dently adjusted to match circuit board impedances to

reduce spower supply noise, overshoot/undershoot and

EMI. Table 1 displays typical rise / fall times for the

output with a 15pF load capacitance as a function of

these control pins at VDD = 3.3V and room temperature.

Output Drive Strength Bits [OXS1, OXS0] - Default is [11]

00

01

10

11

tr (ns)

1.6

1.4

1.2

1.1

tf (ns)

2.4

2.2

1.5

1.4

Table 1. Rise/Fall Times for Drive Strengths

Output Clock Frequencies

Frequency select bits are weakly tied high so if left unconnected the default setting will be [111] and the device will output the

associated frequency highlighted in bold.

Freq (MHz)

Freq Select Bits [FS2, FS1, FS0] - Default is [111]

000

001

010

011

100

101

110

111

CLK1

NA

NA

NA

NA

NA

NA

NA

20

CLK2

NA

NA

NA

NA

NA

NA

NA

20

Table 2. Pin-Selectable Output Frequencies

Absolute Maximum Ratings

Item

Min.

Max.

Units

Condition

Supply Voltage

-0.3

+4.0

V

Input Voltage

-0.3

VDD + 0.3

V

Junction Temp

-

+150

°C

Storage Temp

-55

+150

°C

Soldering Temp

-

+260

°C

40sec max.

ESD

HBM

MM

CDM

-

4000

400

1500

V

1000+ years of data retention on internal memory

May 10, 2016

3

Revision 1.0

tcghelp@micrel.com or (408) 955-1690

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