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EP7309 Datasheet(PDF) 33 Page - Cirrus Logic |
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EP7309 Datasheet(HTML) 33 Page - Cirrus Logic |
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33 / 46 page  DS507PP1 Copyright 2001 Cirrus Logic (All Rights Reserved) 33 EP7309 High-Performance, Low-Power System on Chip 256-Ball PBGA Pinout (Top View) ) 256-Ball PBGA Ball Listing The list is ordered by ball location. 1 2 3 4 5 6 7 8 910 11 121314 15 16 A VDDIO nCS[4] nCS[1] N/C N/C DD[1] M VDDIO D[0] D[2] A[3] VDDIO A[6] MOSCOUT VDDOSC VSSIO A B nCS[5] VDDIO nCS[3] nMOE VDDIO N/C DD[2] CL[1] VDDCORE D[1] A[2] A[4] A[5] WAKEUP VDDIO nURESET B C VDDIO EXPCLK VSSIO VDDIO VSSIO VSSIO VSSIO VDDIO VSSIO VSSIO VSSIO VDDIO VSSIO VSSIO nPOR nEXTPWR C D WRITE EXPRDY VSSIO VDDIO nCS[2] nMWE N/C CL[2] VSSRTC D[4] nPWRFL MOSCIN VDDIO VSSIO D[7] D[8] D E RXD[2] PB[7] TDI WORD VSSIO nCS[0] N/C FRM A[0] D[5] VSSOSC VSSIO nMEDCHG/ nBROM VDDIO D[9] D[10] E F PB[5] PB[3] VSSIO TXD[2] RUN/ CLKEN VSSIO N/C DD[3] A[1] D[6] VSSRTC BATOK nBATCHG VSSIO D[11] VDDIO F G PB[1] VDDIO TDO PB[4] PB[6] VSSRTC VSSRTC DD[0] D[3] VSSRTC A[7] A[8] A[9] VSSIO D[12] D[13] G H PA[7] PA[5] VSSIO PA[4] PA[6] PB[0] PB[2] VSSRTC VSSRTC A[10] A[11] A[12] A[13] VSSIO D[14] D[15] H J PA[3] PA[1] VSSIO PA[2] PA[0] TXD[1] CTS VSSRTC VSSRTC A[17] A[16] A[15] A[14] nTRST D[16] D[17] J K LEDDRV PHDIN VSSIO DCD nTEST[1] EINT[3] VSSRTC ADCIN COL[4] TCLK D[20] D[19] D[18] VSSIO VDDIO VDDIO K L RXD[1] DSR VDDIO nEINT[1] PE[2]/ CLKSEL VSSRTC PD[0]/ LEDFLSH VSSRTC COL[6] D[31] VSSRTC A[22] A[21] VSSIO A[18] A[19] L M nTEST[0] nEINT[2] VDDIO PE[0]/ BOOTSEL[0] TMS VDDIO SSITXFR DRIVE[1] FB[0] COL[0] D[27] VSSIO A[23] VDDIO A[20] D[21] M N nEXTFIQ PE[1]/ BOOTSEL[1] VSSIO VDDIO PD[5] PD[2] SSIRXDA ADCCLK SMPCLK COL[2] D[29] D[26] HALFWORD VSSIO D[22] D[23] N P VSSRTC RTCOUT VSSIO VSSIO VDDIO VSSIO VSSIO VDDIO VSSIO VDDIO VSSIO VSSIO VDDIO VSSIO D[24] VDDIO P R RTCIN VDDIO PD[4] PD[1] SSITXDA nADCCS VDDIO ADCOUT COL[7] COL[3] COL[1] D[30] A[27] A[25] VDDIO A[24] R T VDDRTC PD[7] PD[6] PD[3] SSICLK SSIRXFR VDDCORE DRIVE[0] FB[1] COL[5] VDDIO BUZ D[28] A[26] D[25] VSSIO T Table U. 256-Ball PBGA Ball Listing Ball Location Name Type Description A1 VDDIO Pad power Digital I/O power, 3.3V A2 nCS[4] O Chip select out A3 nCS[1] O Chip select out A4 N/C O A5 N/C O A6 DD[1] O LCD serial display data A7 M O LCD AC bias drive A8 VDDIO Pad power Digital I/O power, 3.3V A9 D[0] I/O Data I/O A10 D[2] I/O Data I/O A11 A[3] O System byte address A12 VDDIO Pad power Digital I/O power, 3.3V A13 A[6] O System byte address A14 MOSCOUT O Main oscillator out A15 VDDOSC Oscillator power Oscillator power in, 2.5V A16 VSSIO Pad ground I/O ground B1 nCS[5] O Chip select out B2 VDDIO Pad power I/O ground B3 nCS[3] O Chip select out B4 nMOE O ROM, expansion OP enable B5 VDDIO Pad power Digital I/O power, 3.3V B6 N/C O Table U. 256-Ball PBGA Ball Listing (Continued) Ball Location Name Type Description |
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