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DSD1791 Datasheet(PDF) 6 Page - Texas Instruments |
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DSD1791 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 53 page DSD1791 SLES072A − MARCH 2003 − REVISED JANUARY 2004 www.ti.com 6 Terminal Functions TERMINAL I/O DESCRIPTIONS NAME PIN I/O DESCRIPTIONS AGNDC 16 − Analog ground (internal bias and current DAC) AGNDF 9 − Analog ground (DACFF) AGNDL 19 − Analog ground (L-channel I/V) AGNDR 11 − Analog ground (R-channel I/V) DBCK 4 I Bit clock input for DSD mode (1) DGND 8 − Digital ground DSDL 25 I L-channel audio data input for DSD mode (1) DSDR 24 I R-channel audio data input for DSD mode (1) MC 27 I Mode control clock input (1) MDI 26 I/O Mode control data input (2) MS 28 I/O Mode control chip select input (2) PBCK 2 I Bit clock input for PCM mode (1) PDATA 3 I Serial audio data input for PCM mode (1) PLRCK 1 I Left and right clock (fS) input for PCM mode (1) RST 6 I Reset (1) SCK 5 I System clock input (1) VCCC 15 − Analog power supply (internal bias and current DAC), 5 V VCCF 21 − Analog power supply (DACFF), 5 V VCCL 20 − Analog power supply (L-channel I/V), 5 V VCCR 10 − Analog power supply (R-channel I/V), 5 V VCOM 14 − Internal bias decoupling pin VDD 7 − Digital power supply, 3.3 V VOUTL+ 17 O L-channel analog voltage output + VOUTL– 18 O L-channel analog voltage output – VOUTR+ 13 O R-channel analog voltage output + VOUTR– 12 O R-channel analog voltage output – ZEROL 23 O Zero flag for L-channel ZEROR 22 O Zero flag for R-channel (1) Schmitt-trigger input, 5-V tolerant (2) Schmitt-trigger input and output. 5-V tolerant input and CMOS output. |
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