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ADP3204 Datasheet(PDF) 2 Page - Analog Devices

Part No. ADP3204
Description  3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADP3204 Datasheet(HTML) 2 Page - Analog Devices

 
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REV. 0
–2–
ADP3204–SPECIFICATIONS1
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SUPPLY-UVLO-SHUTDOWN
Normal Supply Current
ICC
711
mA
UVLO Supply Current
ICCUVLO
425
A
Shutdown Supply Current
ICCSD
SD = L, 3.0 V
≤ VCC ≤ 3.6 V
70
A
UVLO Threshold
SD = H
VCCH
VCC ramping up, VSS = 0 V
2.95
V
VCCL
VCC ramping down,
2.60
V
VSS floating
UVLO Hysteresis
VCCHYS
55
mV
Shutdown Threshold
(CMOS Input)
VSDTH
VCC/2
V
POWER GOOD
Core Feedback Threshold Voltage
VCOREFBH
0.9 V < VDAC < 1.675 V
VCOREFB ramping up
1.12 VDAC
1.14 VDAC
V
VCOREFB ramping down
1.10 VDAC
1.12 VDAC
V
VCOREFB ramping up
0.88 VDAC
0.90 VDAC
V
VCOREFB ramping down
0.86 VDAC
0.88 VDAC
V
Power Good Output Voltage
VPWRGD
VCOREFB = VDACOUT
0.95 VCC
VCC
V
(Open-Drain Output)
VCOREFB = 0.8 VDACOUT
0
0.8
V
Masking Time
2
tPWRGDMSK
3
100
s
SOFT START/HICCUP TIMER
Charge/Discharge Current
ISS
VSS = 0 V
–55
A
VSS = 0.5 V
1.2
A
Soft Start Enable/Hiccup
VSSEN
VREG = 1.25 V,
Termination Threshold
VRAMP = VCOREFB = 1.27 V
VSS ramping down
200
300
mV
Soft Start Termination/Hiccup
VSSTERM
VRAMP = VCOREFB = 1.27 V
Enable Threshold
VSS ramping up
1.70
2.00
2.25
V
VID DAC
VID Input Threshold
VVID0..4
VCC/2
V
(CMOS Inputs)
VID Input Current
IVID0..4
VID0 to VID4 = L
85
A
(Internal Active Pull-Up)
Output Voltage
VDAC
See VID Code, Table 1
0.600
1.750
V
Accuracy
VDAC/VDAC
1.750 V
≥ V
DAC
≥ 0.850 V
–1.0
+1.0
%
0.825 V
≥ VDAC ≥ 0.600 V
–8.5
+8.5
mV
Settling Time
tDACS
4
CDACRAMP = 100 pF
3.5
s
CDACRAMP = 1 nF
25
s
DACRAMP Inner Resistance
5
RDACRAMP
10
k
(0
°C TA
100
°C, High (H) = VCC, Low (L) = 0 V, VCC = 3.3 V, SD = H, VCOREFB =
VDAC (VDACOUT), VREG = VCS– = VVID = 1.25 V, CDACRAMP = 100 pF, ROUT1 = ROUT2 = ROUT3 =
100 k
, COUT1 = COUT2 = COUT3 =10 pF, CSS = 0.047 F, RPWRGD = 680
to 1.2 V, RCLAMP = 5.1 k
to VCC, HYSSET, BSHIFT, DSHIFT, and
DPRSHIFT are open, BOM = H,
DPSLP = H, DPRLP = L, unless otherwise noted.) Current sunk by a pin has a positive sign, sourced by a pin has a
negative sign. Negative sign is disregarded for min and max values.


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