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ADE3000 Datasheet(PDF) 44 Page - STMicroelectronics |
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ADE3000 Datasheet(HTML) 44 Page - STMicroelectronics |
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44 / 88 page  Data Measurement Block ADE3XXX 44/88 The first and last pixels are measured for each line, and the earliest first and latest last for the selected pixel area are reported out at the end of the measurement. The intention is that "last data pixel plus one" minus "first data pixel" is equal to the horizontal width of the video format. 2.12.6 V Position Min / Max Vertical position measures the start and end of video data in hsyncs relative to the posedge of vsync. Data vertical start is defined as the number of hsyncs between posedge of vsync and the "first data pixel line". First data pixel line definition is the first line with at least one pixel greater then the programmable threshold. Data vertical end is defined as the number of hsyncs between posedge of vsync and the "first blanking line after data plus one". The first blanking line is detected and confirms that each subsequent line contains no data pixels. The confirmation of the first blanking line measurement ends at the posedge of vsync. First blanking line after data definition is the row after the last row with at least one pixel greater than the programmable threshold. The first and last data pixel lines are measured within a frame. The earliest first and latest last data pixels corresponding to the selected pixel area are reported out at the end of the measurement. The intention is that "data vertical end plus one" minus "data vertical start" is equal to the vertical height of the video format. 2.12.7 DE Size DE Size measures the number of INCLKs per data enable. DVI input measures precisely the input image horizontal size. At the end of the measurement (DE falling edge), the measured value is compared to a programmed expected value +/- a programmed threshold. If the expected value is within the threshold, the DE_size_mismatch flag is not set. If the measued size is outside the threshold, the DE_size_mismatch flag is set. In Free-running mode, results are updated at every line. The DE_size_mismatch flag is set at DE falling edge and reset at DE rising edge. In One-shot mode, results are updated once and kept until they are cleared by software. The DE_size_mismatch flag can only be cleared when the reset flag bit is set by software. Table 16: Data Measurement Registers (Sheet 1 of 5) Register Name Addr Mode Bits Default Description DMEAS_ALG_CTRL 0x0900 [7:5] Reserved R/W [4] 0x0 Interlace Mode Enable R/W [3] 0x0 0: use data valid (TV mode only) 1: use data enable for data valid R/W [2:0] 0x0 Algorithm 0x0: PHM Edge Intensity & Pixel Sum 0x1: DMM Min / Max 0x2: DMM PCD 0x3: DMM H position and V position 0x4: DMM DE size 0x5 - 0x7: Reserved |
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