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LMR824FVJ-E2 Datasheet(PDF) 7 Page - Rohm |
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LMR824FVJ-E2 Datasheet(HTML) 7 Page - Rohm |
7 / 53 page Datasheet www.rohm.com TSZ02201-0RAR0G200490-1-2 ©2013 ROHM Co., Ltd. All rights reserved. 7/49 11.May.2015 Rev.006 TSZ22111・15・001 LMR821G LMR822xxx LMR824xxx Electrical Characteristics - continued ○LMR822xxx (Unless otherwise specified VDD=+5.0V, VSS=0V) Parameter Symbol Temperature Range Limits Unit Conditions Min Typ Max Input Offset Voltage (Note 27,28) VIO 25°C - 1 5 mV VDD=2.5V to 5.5V Full Range - - 5 Input Offset Voltage Drift ΔVIO/ΔT 25°C - 1 - μV/°C - Input Offset Current (Note 27) IIO 25°C - 0.5 30 nA - Input Bias Current (Note 27) IB 25°C - 40 100 nA - Supply Current (Note 28) IDD 25°C - 650 850 μA AV=0dB, V+IN=2.5V Full Range - - 1200 Maximum Output Voltage(High) VOH 25°C 4.75 4.84 - V RL=600Ω (Note 30) 4.85 4.90 - RL=2kΩ (Note 30) Maximum Output Voltage(Low) VOL 25°C - 170 250 mV RL=600Ω (Note 30) - 100 150 RL=2kΩ (Note 30) Large Signal Voltage Gain AV 25°C - 105 - dB RL=600Ω (Note 30) 95 105 - RL=2kΩ (Note 30) Input Common-mode Voltage Range VICM 25°C 0 - 4.1 V VSS to (VDD-0.9V) Common-mode Rejection Ratio CMRR 25°C 72 90 - dB - Power Supply Rejection Ratio PSRR 25°C 75 85 - dB VDD=2.7V to 5.5V VICM=1V Output Source Current (Note 29) ISOURCE 25°C 20 45 - mA VOUT=0V Short Circuit Current Output Sink Current (Note 29) ISINK 25°C 20 40 - mA VOUT=5V Short Circuit Current Slew Rate SR 25°C - 2.0 - V/μs CL=25pF Gain Bandwidth GBW 25°C - 5.5 - MHz CL=25pF, AV=40dB f=1MHz Phase Margin θ 25°C - 50 - deg CL=25pF, AV=40dB Gain Margin GM 25°C - 4.5 - dB CL=25pF, AV=40dB Input Referred Noise Voltage VN 25°C - 30 - Hz nV/ f=1kHz Total Harmonic Distortion + Noise THD+N 25°C - 0.01 - % VOUT=4.1VP-P, f=1kHz RL=10kΩ AV=0dB, DIN-AUDIO Channel Separation CS 25°C - 100 - dB AV=40dB, VOUT=0.5Vrms (Note 27) Absolute value (Note 28) Full Range: TA=-40°C to +85°C (Note 29) Consider the power dissipation of the IC under high temperature environment when selecting the output current value. There may be a case where the output current value is reduced due to the rise in IC temperature caused by the heat generated inside the IC. (Note 30) Output load resistance connects to a half of VDD. |
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