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54AC11534 Datasheet(PDF) 5 Page - Texas Instruments |
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54AC11534 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 7 page  54AC11534, 74AC11534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS037A – JULY 1987 – REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–5 PARAMETER MEASUREMENT INFORMATION 50% VCC 50% 50% 50% VCC VCC 0 V 0 V th tsu VOLTAGE WAVEFORMS Data Input tPLH tPHL tPHL tPLH VOH VOH VOL VOL 50% 50% VCC 0 V 50% VCC 50% VCC Input (see Note B) Out-of-Phase Output In-Phase Output Timing Input (see Note B) 50% VCC VOLTAGE WAVEFORMS From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 2 × VCC 500 Ω 500 Ω Output Control (low-level enabling) Output Waveform 1 S1 at 2 × VCC (see Note C) Output Waveform 2 S1 at GND (see Note C) VOL VOH tPZL tPZH tPLZ tPHZ 50% 50% [ VCC 0 V 50% VCC 20% VCC 50% VCC 80% VCC [ 0 V VCC GND Open VOLTAGE WAVEFORMS tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND TEST S1 VCC 0 V 50% 50% tw VOLTAGE WAVEFORMS Input NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms |
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