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MRF24XA Datasheet(PDF) 100 Page - Microchip Technology |
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MRF24XA Datasheet(HTML) 100 Page - Microchip Technology |
100 / 258 page MRF24XA DS70005023C-page 100 Preliminary 2015 Microchip Technology Inc. REGISTER 4-1: MACCON1 (MAC CONTROL 1 REGISTER) ADDRESS: 0x10 R/W-00 R/W-001 R/W-1 R/W-0 R/W-0 TRXMODE<1:0> ADDRSZ<2:0> CRCSZ FRMFMT SECFLAGOVR bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown r = Reserved bit 7-6 TRXMODE<1:0>: TX/RX Mode Select Field bits 11 = Reserved 10 = TX-Streaming mode. In this mode, use both buffers for packet transmission. When issuing TRX- MODE = 10, RXEN is cleared. SPI addresses 0x200 to 0x27F access Buffer 1 or Buffer 2 in alternation. Access to 0x37F through 0x383 has non-defined effect. 01 = RX-Streaming mode. In this mode, use both buffers for packet reception. When issuing TRXMODE = 01, TXST and TXENC/RXDEC bits are cleared and RXEN is set. SPI addresses 0x300 to 0x383 access Buffer 1 or Buffer 2 in alternation. In this mode, Proprietary mode packets other than stream- ing type are automatically discarded. Access to 0x200 through 0x283 has non-defined effect. 00 = Packet mode. In this mode, Buffer 1 is used as a transmit and Buffer 2 is used as a receive packet buffer. SPI addresses from 0x200 to 0x27F access Buffer 1. SPI addresses 0x300 to 0x383 access Buffer 2. TRXMODE = 00 is mandatory when FRMFMT = 0. bit 5-3 ADDRSZ<2:0>: Source/Destination Address Size Field bits(1, 2) The size of the Source and Destination addresses for Proprietary packet. Note that this field has no effect on the processing IEEE 802.15.4 frames. 111 = 8 octets 110 = 7 octets 101 = 6 octets 100 = 5 octets 011 = 4 octets 010 = 3 octets 001 = 2 octets 000 = 1 octet bit 2 CRCSZ: CRC Size bit This bit indicates the size of the CRC field in each packet. 1 = 2 octets 0 = 0 octet bit 1 FRMFMT: MAC Frame Format Adopted by the Network bit(3) This bit determines the frame format used in the network. 1 = Proprietary 0 = IEEE 802.15.4 standard compliant bit 0 SECFLAGOVR: Security Flag Override bit The user can override security flags used in the CCM-CTR, CBC-MAC and CCM operation, otherwise the device uses the standard (2003/2006) definition. Note 1: Zero-length address occurs when the corresponding DAddrPrsnt/SAddrPrsnt bits of the packet Frame Con- trol field are set to ‘0’. 2: Use the ADDRSZ field while receiving and transmitting, and must not be modified while RXEN or TXST is set. 3: Use the FRMFMT field while receiving and transmitting, and must not be modified while RXEN or TXST is set. In Debug mode, this register bit is used to determine the frame format for both Tx/Rx frame in the packet buffers. |
Similar Part No. - MRF24XA_15 |
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Similar Description - MRF24XA_15 |
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