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MRF24XA Datasheet(PDF) 60 Page - Microchip Technology |
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MRF24XA Datasheet(HTML) 60 Page - Microchip Technology |
60 / 258 page MRF24XA DS70005023C-page 60 Preliminary 2015 Microchip Technology Inc. REGISTER 2-46: IFGAP (INTER FRAME CONFIGURATION REGISTER) ADDRESS 0x39 REGISTER 2-47: TXPOW (TRANSMIT POWER CONFIGURATION REGISTER) ADDRESS 0x3A R-000 R/W-10111 r IFGAP<4:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown r = Reserved bit 7-5 Reserved: Maintain as ‘0’ bit 4-0 IFGAP<4:0>: TX Interframe-Gap Field bits This field allows configuring a TX interframe-gap ranging from 0 to 30 μs. This duration is enforced as a minimum separation between the last sample of a transmitted frame and the start of the preamble for a potential subsequent frame transmission. Unit is 2 μs/LSB. R/W-000 R/W-11111 CHIPBOOST<2:0> TXPOW<4:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown r = Reserved bit 7-5 CHIPBOOST<2:0>: TX Chip Boosting Field bits This field modifies the spectrum of the OQPSK transmission. bit 4-0 TXPOW<4:0>: TX Power Register Field bits This field allows configuring a TX power ranging from -19 to 1 dBm. Encoding: 11111 = +1 dBm • • • 00001 = -19 dBm 00000 = PA OFF |
Similar Part No. - MRF24XA_15 |
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Similar Description - MRF24XA_15 |
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