Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

TLV5608 Datasheet(PDF) 5 Page - Texas Instruments

Click here to check the latest version.
Part No. TLV5608
Description  8-CHANNEL, 12-/10-/8-BIT, 2.7-V TO 5.5-V LOW POWER DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLV5608 Datasheet(HTML) 5 Page - Texas Instruments

  TLV5608 Datasheet HTML 1Page - Texas Instruments TLV5608 Datasheet HTML 2Page - Texas Instruments TLV5608 Datasheet HTML 3Page - Texas Instruments TLV5608 Datasheet HTML 4Page - Texas Instruments TLV5608 Datasheet HTML 5Page - Texas Instruments TLV5608 Datasheet HTML 6Page - Texas Instruments TLV5608 Datasheet HTML 7Page - Texas Instruments TLV5608 Datasheet HTML 8Page - Texas Instruments TLV5608 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 16 page
background image
www.ti.com
ELECTRICAL CHARACTERISTICS (CONTINUED)
TIMING REQUIREMENTS
TLV5608
TLV5610
TLV5629
SLAS268E – MAY 2000 – REVISED MARCH 2004
over recommended operating free-air temperature range, supply voltages, and reference voltages (unless otherwise noted)
ANALOG OUTPUT DYNAMIC PERFORMANCE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Fast
1
3
ts(FS)
Output settling time (full scale)
RL = 10 kΩ, CL = 100 pF
(1)
µs
Slow
3
7
Fast
0.5
1
ts(CC)
Output settling time, code to code
RL = 10 kΩ, CL = 100 pF
(2)
µs
Slow
1
2
Fast
4
10
SR
Slew rate
RL = 10 kΩ, CL = 100 pF
(3)
V/µs
Slow
1
3
Glitch energy
See note (4)
4
nV-s
Channel crosstalk
10 kHz sine, 4 VPP
-90
dB
(1)
Settling time is the time for the output signal to remain within +0.5 LSB of the final measured value for a digital input code change of
0x80 to 0xFFF and 0xFFF to 0x080, respectively. Assured by design; not tested.
(2)
Settling time is the time for the output signal to remain within +0.5 LSB of the final measured value for a digital input code change of one
count. The max time applies to code changes near zero scale or full scale. Assured by design; not tested.
(3)
Slew rate determines the time it takes for a change of the DAC output from 10% to 90% full scale voltage.
(4)
Code transition: TLV5610 - 0x7FF to 0x800, TLV5608 - 0x7FC to 0x800, TLV5629 - 0x7F0 to 0x800
DIGITAL INPUTS
MIN
NOM
MAX
UNIT
tsu(FS-CK)
Setup time, FS low before next negative SCLK edge
8
ns
Setup time, 16th negative edge after FS low on which bit D0 is sampled before
tsu(C16-FS)
10
ns
rising edge of FS. µC mode only
tsu(FS-C17)
µC mode, setup time, FS high before 17th positive SCLK.
10
ns
tsu(CK-FS)
DSP mode, setup time, SLCK low before FS low.
5
ns
twL(LDAC)
LDAC duration low
10
ns
twH
SCLK pulse duration high
16
ns
twL
SCLK pulse duration low
16
tsu(D)
Setup time, data ready before SCLK falling edge
8
ns
th(D)
Hold time, data held valid after SCLK falling edge
5
ns
twH(FS)
FS duration high
10
ns
twL(FS)
FS duration low
10
ns
See AC
ts
Settling time
specs
5


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn