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LTC3129-1 Datasheet(PDF) 10 Page - Linear Integrated Systems |
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LTC3129-1 Datasheet(HTML) 10 Page - Linear Integrated Systems |
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10 / 20 page  LTC4419 10 4419f For more information www.linear.com/LTC4419 where IOUT is the current supplied by COUT during non- overlap or “dead” time tNOV. Choosing: COUT ≥ tNOV •IOUT ∆VOUT (5) limits output droop to less than ∆VOUT. In order to estimate tNOVandIOUT,firstconsiderascenario where power supplies are present on both V1 and V2, and their voltages are changing slowly compared to the ADJ comparator propagation delay tPDA. In such cases, IOUT is ILOAD and tNOV is tSWITCH. COUT can be sized according to equation 5 with IOUT = ILOAD(MAX) and tNOV = tSWITCH(MAX) tolimitmaximumoutputdroopwhenswitchingtoahigher supply. When switching to a lower supply, switchover is initiated only after OUT falls VREV below the supply that is being switched in. In such cases, total output droop is ∆VOUT + VREV. Next consider a scenario where the input power source powering OUT is unplugged. OUT back-feeds circuitry connected to the input supply pin. Both input and output droop at the same rate. Referring to Figure 1, assume the battery on V1 is unplugged when OUT is connected to V1. IOUT is the sum of ILOAD and the reverse current IBACK, which in this example is IR3. As OUT and V1, since the two are connected, droop below the ADJ threshold, switchover occurs to V2 with a dead time: tNOV = tPDA + tSWITCH (6) where tPDA is an overdrive dependent ADJ comparator delay. As an approximation, use tPDA from the Electrical Characteristics table to estimate tNOV. Use this tNOV and: IOUT = (IBACK + ILOAD) (7) in equation 5 to size COUT: COUT ≥ tPDA +tSWITCH ( )•IOUT ∆VOUT (8) RefertoFigure2foramoreaccurateestimateoftPDAversus dVOUT/dt. If ADJ is filtered with capacitor, its discharge time via divider R1-R3 increases tPDA. This results in a higher output droop than estimated by equation 8. applicaTions inForMaTion In order to limit output rising slew rate dVOUT/dt, size: COUT ≥ ILIM dVOUT dt (9) as the LTC4419 limits OUT charging current to ILIM until OUT approaches the input supply to within ILIM • RON, where RON is the channel switch resistance. Refer to the Thermal Protection and Maximum COUT section to deter- mine maximum allowed COUT. Inductive Effects Parasitic inductance and resistance can impact circuit performance by causing overshoot and undershoot of inputandoutputvoltagesdependingonthescenario.Para- sitic inductance in the power path causes positive-going overshoot on the input and a negative-going undershoot on the output when the LTC4419 turns off. Another cause of positive input overshoot is R-L-C tank ringing during hot plug of an input supply. Input overshoot is most pro- nounced when the total resistance of the input tank is low. Care must be taken to ensure overvoltage transients do not exceed the absolute maximum ratings of the LTC4419. Additionally,parasiticresistanceandinductancecancause input undershoot during power path turn-on. If severe enough, undershoot can temporarily invalidate a supply and cause repeated power up cycles (“motorboating”) or unwanted switchover between sources. dVADJ/dt (V/s) 10 100 1k 10k 100k 0 25 50 75 100 125 4419 F02 Figure 2. ADJ Comparator Propagation Delay as a Function of Slew Rate; tPDA vs dVADJ/dt |
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Similar Description - LTC3129-1 |
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