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TXS0206-29YFPRB Datasheet(PDF) 4 Page - Texas Instruments |
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TXS0206-29YFPRB Datasheet(HTML) 4 Page - Texas Instruments |
4 / 27 page V CCA V CCB Translator One-Shot One-Shot CMDB R2 (see Note A) Gate Control CMDA R1 (see Note A) Translator One-Shot One-Shot CLKA CLKB CLK-f EN (see Note B) V CCA V CCB Translator One-Shot One-Shot DAT0B R2 (see Note A) Gate Control DAT0A R1 (see Note A) Translator One-Shot One-Shot V CCA V CCB Translator One-Shot One-Shot DAT1B R2 (see Note A) Gate Control DAT1A R1 (see Note A) Translator One-Shot One-Shot V CCA V CCB Translator One-Shot One-Shot DAT2B R2 (see Note A) Gate Control DAT2A R1 (see Note A) Translator One-Shot One-Shot V CCA V CCB Translator One-Shot One-Shot DAT3B R2 (see Note A) Gate Control DAT3A R1 (see Note A) Translator One-Shot One-Shot WP/CD 100 kW V CCA V CCB V CCA TXS0206-29 SCES690 – DECEMBER 2009 www.ti.com A. R1 and R2 resistor values are determined based upon the logic level applied to the A port or B port as follows: R1 and R2 = 40 kΩ when a logic level low is applied to the A port or B port. R1 and R2 = 4 kΩ when a logic level high is applied to the A port or B port. R1 and R2 = 70 kΩ when the port is deselected (or in High-Z or 3-state). B. EN controls all output buffers. When EN = low, all outputs are Hi-Z. Figure 3. Logic Diagram 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated |
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