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IS46TR85120A-125KBLA2 Datasheet(PDF) 8 Page - Integrated Silicon Solution, Inc |
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IS46TR85120A-125KBLA2 Datasheet(HTML) 8 Page - Integrated Silicon Solution, Inc |
8 / 88 page IS43/46TR16256A, IS43/46TR16256AL, IS43/46TR85120A, IS43/46TR85120AL Integrated Silicon Solution, Inc. – www.issi.com – 8 Rev. G2 07/28/2016 10. Issue ZQCL command to starting ZQ calibration. 11. Wait for both tDLLK and tZQinit completed. 12. The DDR3 SDRAM is now ready for normal operation. Figure2.1.1 Reset and Initialization Sequence at Power-on Ramping Ta CK,CK# VDD,VDDQ RESET# CKE CMMAND BA ODT RTT Tb T=200µS Tmin=10nS T=500µS tCKSRX tIS tIS tIS ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) Tc Td ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) tXPR tMRD tMRD tMRD tMOD tZQinit tDLLK tIS Valid Valid Valid Valid MRD MRD MRD MRD ZQCL 1) MR2 MR3 MR1 MR0 ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) Te Tf Tg Th Ti Tj Tk Note1. From time point “Td” until “Tk” NOP or DES commands must be applied between MRS and ZQCL commands. Time Break DON’T CARE Static LOW in case RTT_Nom is enabled at time Tg, otherwise static HIGH or LOW 1) |
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