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IS66WVE1M16EALL-70BLI Datasheet(PDF) 13 Page - Integrated Silicon Solution, Inc

Part No. IS66WVE1M16EALL-70BLI
Description  16Mb Async/Page PSRAM
Download  34 Pages
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Maker  ISSI [Integrated Silicon Solution, Inc]
Homepage  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS66WVE1M16EALL-70BLI Datasheet(HTML) 13 Page - Integrated Silicon Solution, Inc

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IS66/67WVE1M16EALL/EBLL/ECLL
IS66/67WVE1M16TALL/TBLL/TCLL
Rev. C | Oct. 2015
www.issi.com - SRAM@issi.com
Configuration Registers Operation
The configuration register (CR) defines how the PSRAM device performs a transparent self refresh.
Altering the refresh parameters can dramatically reduce current consumption during standby mode.
Page mode controls is embedded in the CR. This register can be updated any time the device is
operating in a standby state. The control bits used in the CR are shown in Table 3. At power-up,
the CR is set to 0070h.
Access Using ZZ#
The CR can be loaded using a WRITE operation immediately after ZZ# makes a HIGH-to-LOW
transition (see Figure 5). The values placed on addresses A[19:0] are latched into the CR on the
rising edge of CE# or WE#, whichever occurs first. LB#/UB# are “Don’t Care.” Access using ZZ#
is WRITE only.
Figure 5: Load Configuration Register Operation Using ZZ#
Address
CE#
ZZ#
WE#
VALID
ADDRESS
t < 500ns


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