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REG104FA-3.3KTTT Datasheet(PDF) 10 Page - Texas Instruments |
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REG104FA-3.3KTTT Datasheet(HTML) 10 Page - Texas Instruments |
10 / 22 page SBVS025G REG104 10 connected from the output to the adjust pin will reduce both the output noise and the peak error from a load transient. Figure 7 shows improved output noise performance for two capacitor combinations. FIGURE 7. Output Noise Density on Adjustable Versions. FIGURE 8. Transient and DC Dropout. For large step changes in load current, the REG104 requires a larger voltage drop across it to avoid degraded transient response. The boundary of this transient dropout region is shown as the top line in Figure 8. Values of VIN to VOUT voltage drop above this line insure normal transient re- sponse. In the transient dropout region between DC and Transient, transient response recovery time increases. The time re- quired to recover from a load transient is a function of both the magnitude and rate of the step change in load current and the available headroom VIN to VOUT voltage drop. Under worst-case conditions (full-scale load change with VIN to VOUT voltage drop close to DC dropout levels), the REG104 can take several hundred microseconds to re-enter the specified window of regulation. TRANSIENT RESPONSE The REG104 response to transient line and load conditions improves at lower output voltages. The addition of a capaci- tor (nominal value 10nF) from the output pin to ground may improve the transient response. In the adjustable version, the addition of a capacitor, CFB (nominal value 10nF), from the output to the adjust pin will also improve the transient response. THERMAL PROTECTION Power dissipated within the REG104 will cause the junction temperature to rise. The REG104 has thermal shutdown circuitry that protects the regulator from damage. The ther- mal protection circuitry disables the output when the junc- tion temperature reaches approximately 150 °C, allowing the device to cool. When the junction temperature cools to approximately 130 °C, the output circuitry is again enabled. Depending on various conditions, the thermal protection circuit may cycle on and off. This limits the dissipation of the regulator, but may have an undesirable effect on the load. Any tendency to activate the thermal protection circuit indi- cates excessive power dissipation or an inadequate heat sink. For reliable operation, junction temperature should be limited to 125 °C, maximum. To estimate the margin of safety in a complete design (including heat sink), increase the ambient temperature until the thermal protection is triggered. Use worst-case loads and signal conditions. For good reli- ability, thermal protection should trigger more than 35 °C above the maximum expected ambient condition of your application. This produces a worst-case junction temperature of 125 °C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the REG104 has been designed to protect against overload conditions. It was not intended to replace proper heat sinking. Continuously run- ning the REG104 into thermal shutdown will degrade reliabil- ity. 250 200 150 100 50 0 0 100 200 300 400 500 I OUT (mA) REG104 –3.3 at 25 °C DC Transient 100 10 1000 10000 100000 10.0 1.0 0.1 Frequency C OUT = 0, CFB = 0 C OUT = 0, CFB = 0.01µF C OUT = 10µF, CFB = 0.01µF The REG104 utilizes an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the DMOS pass element above VIN. The charge-pump switching noise (nominal switching frequency = 2MHz) is not measur- able at the output of the regulator. DROP-OUT VOLTAGE The REG104 uses an N-channel DMOS as the pass ele- ment. When the input voltage is within a few hundred millivolts of the output voltage, the DMOS device behaves like a resistor. Therefore, for low values of VIN to VOUT, the regulator’s input-to-output resistance is the RdsON of the DMOS pass element (typically 230m Ω). For static (DC) loads, the REG104 will typically maintain regulation down to VIN to VOUT voltage drop of 230mV at full rated output current. In Figure 8, the bottom line (DC dropout) shows the minimum VIN to VOUT voltage drop required to prevent dropout under DC load conditions. |
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