ADT7483A datasheet(4/20 Pages) ONSEMI

Part #	ADT7483A

Description	Dual Channel Temperature Sensor and Over Temperature Alarm

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ADT7483A

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Table 5. ELECTRICAL CHARACTERISTICS (TA = −40C to +125C, VDD = 3 V to 3.6 V, unless otherwise noted) (Note 1)

Parameter

Test Conditions

Min

Typ

Max

Unit

Power Supply

Supply Voltage, VDD

3.0

3.3

3.6

V

Average Operating Supply Current, IDD

0.0625 Conversions/sec Rate (Note 1)

Standby Mode

−

240

5

350

30

mA

Undervoltage Lockout Threshold

VDD Input, Disables ADC, Rising Edge

−

2.55

−

V

Power-On-Reset Threshold

1

−

2.5

V

Temperature-to-Digital Converter (Note 2)

Local Sensor Accuracy

Resolution

0C  TA  70C

0C  TA  85C

−40C  TA  +100C

−

1

1

1.5

2.5

−

C

Remote Diode Sensor Accuracy

Resolution

0C  TA  70C, −55C  TD  150C (Note 3)

0C  TA  85C, −55C  TD  150C (Note 3)

−40C  TA  +125C, −55C  TD  150C

(Note 3)

−

0.25

1

1.5

2.5

−

C

Remote Sensor Source Current (Note 3)

High Level

Low Level

−

233

14

−

mA

Conversion Time

from Stop Bit to Conversion Complete

(All Channels), One-shot Mode with Averaging

Switched On

One-shot Mode with Averaging Off,

(Conversion Rate = 16, 32, or 64

Conversions/sec)

−

73

11

94

14

ms

Open-drain Digital Outputs (THERM, ALERT/THERM2)

Output Low Voltage, VOL

IOUT = −6.0 mA

−

0.4

V

High Level Output Current, IOH

VOUT = VDD

−

0.1

1

mA

SMBus Interface (Notes 3 and 4)

Logic Input High Voltage, VIH, SCLK, SDATA

2.1

−

V

Logic Input Low Voltage, VIL, SCLK, SDATA

−

0.8

V

Hysteresis

−

500

−

mV

SDA Output Low Voltage, VOL

IOUT = −6.0 mA

−

0.4

V

Logic Input Current, IIH, IIL

−1

−

+1

mA

SMBus Input Capacitance, SCLK, SDATA

−

5

−

pF

SMBus Clock Frequency

−

400

kHz

SMBus Timeout (Note 5)

User Programmable

−

25

32

ms

SCLK Falling Edge to SDATA Valid Time

Master Clocking in Data

−

1

ms

1. See Table 11 for information on other conversion rates.

2. Averaging enabled.

3. Guaranteed by design, not production tested.

4. See SMBus Timing Specifications section for more information.

5. Disabled by default. See the Serial Bus Interface section for details to enable it.

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