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ADT7473ARQZ-REEL Datasheet(PDF) 9 Page - ON Semiconductor |
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ADT7473ARQZ-REEL Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 73 page ADT7473 www.onsemi.com 9 Figure 12. ADT7473 Configuration AMBIENT TEMPERATURE FRONT CHASSIS FAN REAR CHASSIS FAN GND ADT7473 PWM1 TACH1 D2+ D2− THERM SDA SCL SMBALERT TACH2 PWM3 TACH3 D1+ D1− CPU FAN CPU ICH PROCHOT Serial Bus Interface On PCs and servers, control of the ADT7473/ADT7473−1 is carried out using the SMBus. The ADT7473/ADT7473−1 is connected to this bus as a slave device, under the control of a master controller, which is usually (but not necessarily) the ICH. The ADT7473 has a fixed 7-bit serial bus address of 0101110 or 0x2E. The read/write bit must be added to get the 8-bit address (01011100 or 0x5C). When the ADT7473−1 is powered up with Pin 8 (PWM3/ADDREN) high, the ADT7473−1 has a default SMBus address of 0101110 or 0x2E. If more than one ADT7473−1 is used in a system, each ADT7473−1 is placed in ADDR SELECT mode by strapping Pin 8 low on powerup. The logic state of Pin 4 then determines the device’s SMBus address. The logic of these pins is sampled on powerup. The device address is sampled on powerup and latched on the first valid SMBus transaction, more precisely on the low-to-high transition at the beginning of the eighth SCL pulse, when the serial bus address byte matches the selected slave address. The selected slave address is chosen using the ADDREN pin/ADDR SELECT pin. Any attempted change in the address has no effect after this. Table 7. HARDWIRING THE ADT7473−1 SMBUS DEVICE ADDRESS Pin 13 State Pin 14 State Address 0 Low (10 k W to GND) 0101100 (0x2C) 0 High (10 k W Pullup) 0101101 (0x2D) 1 Don’t Care 0101110 (0x2E) Figure 13. Default SMBus Address = 0x2E ADDR SELECT ADT7473−1 4 8 PWM3/ ADDREN 10 k W ADDRESS = 0x2E VCC Figure 14. SMBus Address = 0x2C (Pin 4 = 0) ADDR SELECT ADT7473−1 4 8 PWM3/ ADDREN 10 k W ADDRESS = 0x2C Figure 15. SMBus Address = 0x2D (Pin 4 = 1) ADDR SELECT ADT7473−1 4 8 PWM3/ ADDR_EN 10 k W ADDRESS = 0x2D VCC |
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