NCV8856 datasheet(9/19 Pages) ONSEMI

Part #	NCV8856

Description	Automotive Grade Synchronous Buck Controller

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NCV8856

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DETAILED OPERATING DESCRIPTION

General

The NCV8856 is a synchronous buck controller with

internal 1.5 A gate drivers designed to drive NMOS FETs.

The internal gate drivers simplify design, improve

performance and efficiency and minimize board area. The

controller uses an 800 mV, 2.0% reference, allowing for a

wide range of precise output voltage programmability.

The NCV8856 also provides a programmable fixed

frequency range of 170 kHz to 500 kHz, allowing more

design flexibility in compromising efficiency versus

components’ size and cost. This frequency is conveniently

set with an external resistor to ground. An external clock

signal can also be used to synchronize the NCV8856 to a

higher operating frequency during operation.

To

protect

against

possible

damage

of

external

power−stage components, excessive inrush of current

during start−up is prevented by an internal soft−start, and

inductor current is limited via average current limiting

(ACL) and cycle−by−cycle overcurrent protection (OCP).

Thermal shutdown (TSD) is also implemented to protect the

device from overheating.

Average Current Mode Control

The NCV8856 employs an average current mode control

(ACMC) architecture to regulate the output voltage. ACMC

uses two loops, as seen in Figure 19. Through the current

error amplifier (CEA), the inner current loop monitors the

inductor current with the unity gain current sense amplifier

(CSA). The current loop responds to input voltage changes,

affecting the line transient response. Using the voltage error

amplifier (VEA), the outer voltage loop monitors the output

voltage, responding to output load changes, affecting the

load transient response. Feedback resistors in the voltage

loop select the output voltage.

L

CSA

VEA

CEA

C

PWM

and

Gate Drivers

Inner

Current

Loop

Outer Voltage Loop

Gain=1

Figure 19. ACMC Loops

VSW

RS

RL

VOUT

VREF

Unlike voltage mode control (VMC) of buck regulators,

which almost always require the extra components of a

Type−III compensation network for adequate transient

response,

ACMC

buck

regulators

use

Type−II

compensation. This greatly simplifies the compensator

design and optimization process, while offering much faster

transient response than a Type−I compensation network.

Additionally, the two−loop system separates the effects of

output components between the two loops, further

simplifying the compensation process.

Type−II compensation places a zero and two poles in each

of the error loops to offset the effects of the inherent

open−loop response. This compensation requires a resistor

and two capacitors in the feedback loop for each of the error

amplifiers, shown as complex impedances in Figure 19. An

input resistor from the CSA to the CEA sets the gain of the

CEA. The voltage loop also has a pair of feedback resistors

from VOUT to set the output voltage and gain of the VEA.

Enable

The enable input (EN) is a TTL−compatible input used to

activate the internal LDO. The NCV8856 is disabled when

the EN pin is pulled below the enable input logic low

threshold voltage, causing a normal shutdown to occur,

putting the part into a low quiescent current sleep mode.

Once the device has been disabled it must remain disabled

for the minimum disable time (20 ms) or abnormal startup

behavior may be observed after enable is asserted. When the

EN pin is pulled above the enable input logic high threshold

voltage, the part is enabled, the LDO output is brought up

and then the internal soft−start begins.

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